diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-25 11:30:22 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-28 06:49:08 +0000 |
| commit | a050817ce57ef960bf2bec3a18f23b59039dd184 (patch) | |
| tree | dd53e8378578c37b0d7aec0af2a8e2b0e1326a2d /src/southbridge/intel/bd82x6x/pch.h | |
| parent | a6ab9afc497bb97994353bb8ab7b8a628fbc5c81 (diff) | |
sb/intel/common: Add common code for SMM setup and smihandler
This moves the sandybridge both smm setup and smihandler code to a
common place.
Tested on Thinkpad X220, still boots, resume to and from S3 is fine
so smihandler is still working fine.
Change-Id: I28e2e6ad1e95a9e14462a456726a144ccdc63ec9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23427
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index ac2d036f37..ebcb058c0b 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -68,7 +68,6 @@ int pch_silicon_revision(void); int pch_silicon_type(void); int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); -void gpi_route_interrupt(u8 gpi, u8 mode); #if IS_ENABLED(CONFIG_ELOG) void pch_log_state(void); #endif @@ -104,14 +103,6 @@ early_usb_init (const struct southbridge_usb_port *portmap); int rtc_failure(void); #endif -#define MAINBOARD_POWER_OFF 0 -#define MAINBOARD_POWER_ON 1 -#define MAINBOARD_POWER_KEEP 2 - -#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL -#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON -#endif - /* PM I/O Space */ #define UPRWC 0x3c #define UPRWC_WR_EN (1 << 1) /* USB Per-Port Registers Write Enable */ |