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AgeCommit message (Expand)Author
2021-07-14soc/amd: move check_mca prototype to soc/amd/common/blocks/includeFelix Held
2021-07-14soc/amd/stoneyridge: add and use mca_is_valid_bank & mca_get_bank_nameFelix Held
2021-07-14soc/amd/picasso: implement and use mca_get_bank_nameFelix Held
2021-07-14soc/amd/picasso: implement and use mca_is_valid_bankFelix Held
2021-07-14soc/amd/picasso: check length of mca_bank_name arrayFelix Held
2021-07-14soc/amd/picasso: add missing banks to mca_bank_name arrayFelix Held
2021-07-14soc/amd/stoneyridge: use index for mca_bank_name initializationFelix Held
2021-07-14soc/amd/stoneyridge/mca: add missing types.h includeFelix Held
2021-07-14soc/amd/common/block/lpc: Don't disable the HOG bitRaul E Rangel
2021-07-14soc/amd/cezanne: Move APOB update into ramstageRaul E Rangel
2021-07-14soc/amd/common/block/apob: Fix incorrect printf formatRaul E Rangel
2021-07-14soc/amd/cezanne: add basic MCA supportFelix Held
2021-07-14include/cpu/amd/msr: add and use MC_CTL_MASK macroFelix Held
2021-07-14include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msrFelix Held
2021-07-14soc/amd/picasso/mca: use mca_clear_status()Felix Held
2021-07-14src: use mca_clear_status function instead of open codingFelix Held
2021-07-14soc/mediatek/mt8195: Get DRAM size from DRAM calibration resultRyan Chuang
2021-07-14soc/intel/alderlake: Add GFx Device ID 0x46a6Maulik V Vaghela
2021-07-14soc/intel/common: Use SPR for backing up data way and eviction maskSubrata Banik
2021-07-14soc/intel/skylake: Drop dead `ScanExtGfxForLegacyOpRom`Angel Pons
2021-07-14soc/intel/skylake: Rename `Rmt` devicetree settingAngel Pons
2021-07-14soc/intel/common/block/cpu/cpulib: use mca_get_bank_count()Felix Held
2021-07-14include/cpu/x86/msr: introduce IA32_MC_*(x) macrosFelix Held
2021-07-14soc/amd/stoneyridge/mca: refactor warm boot check in mca_check_all_banksFelix Held
2021-07-14soc/amd/picasso,stoneyridge/mca: factor out mca_check_all_banksFelix Held
2021-07-14soc/amd/picasso,stoneyridge/mca: factor out mca_clear_errorsFelix Held
2021-07-14soc/amd/picasso,stoneyridge/mca: factor out mca_print_error()Felix Held
2021-07-14soc/amd/picasso,stoneyridge/mca: use unsigned int for MCA bank numberFelix Held
2021-07-14soc/amd/picasso,stoneyridge/mca: clean up mca_bank structFelix Held
2021-07-14soc/amd/picasso,stoneyridge/mca: mark num_banks as constantFelix Held
2021-07-14include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISCFelix Held
2021-07-14src: Use initial_lapicid() instead of open coding itArthur Heymans
2021-07-13soc/intel/alderlake: Implement WA for DDR5 DIMM modulesMeera Ravindranath
2021-07-13soc/intel/alderlake: Add (and fix) devices in IRQ tableTim Wawrzynczak
2021-07-12soc/amd/*/mca: use mca_get_bank_count()Felix Held
2021-07-12soc/amd/{cezanne,common}: Enable IOMMU PCIe DeviceRaul E Rangel
2021-07-12soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KBSubrata Banik
2021-07-12soc/amd/cezanne/acpi: Change GPIO controller interrupt to sharedRaul E Rangel
2021-07-12soc/intel/common/irq: Program IRQ pin in irq_program_non_pch()Tim Wawrzynczak
2021-07-12soc/intel/alderlake: Add missing devices to pci_devs.hTim Wawrzynczak
2021-07-12soc/amd/picasso,stoneyridge/mca: remove unneeded line breakFelix Held
2021-07-12soc/intel/alderlake: Set max Pkg C-states to AutoV Sowmya
2021-07-12soc/mediatek/mt8195: fine tune pmif spi hardware settings for stabilityJames Lo
2021-07-08soc/intel/alderlake: Avoid NULL pointer deferenceJohn Zhao
2021-07-07soc/mediatek/mt8195: Add dramc_param.hRyan Chuang
2021-07-07soc/mediatek/mt8195: Enable DCMGarmin Chang
2021-07-06soc/amd/picasso: Allow end range entry for max device ID in IVRSAamir Bohra
2021-07-06arch/x86: Use ENV_X86_64 instead of _x86_64_Patrick Rudolph
2021-07-05soc/intel/alderlake: Add support to update the FIVR configsV Sowmya
2021-07-05soc/intel/alderlake: Correct Bus and Device of Touch Host ControllerVarshit B Pandya
2021-07-02soc/amd/common/espi: Fix debug message log levelRaul E Rangel
2021-07-02soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI readsRaul E Rangel
2021-07-02soc/amd/cezanne: Enable SPI DMA supportRaul E Rangel
2021-07-02soc/amd/common/block/lpc: Add custom SPI DMA boot deviceRaul E Rangel
2021-07-02arch/x86: Add X86_CUSTOM_BOOTMEDIARaul E Rangel
2021-07-02src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons
2021-07-02soc/intel/common/block/cse: Add ME EOP timestampsTim Wawrzynczak
2021-07-02soc/intel/alderlake: Add USB TCSS enablementBernardo Perez Priego
2021-07-01soc/intel/alderlake: Enable energy efficiency turbo modeV Sowmya
2021-07-01soc/intel: Refactor `xdci_can_enable()` functionAngel Pons
2021-07-01soc/intel/alderlake: Select VBOOT_X86_SHA256_ACCELERATION configSubrata Banik
2021-06-30soc/intel/jasperlake: Send End-of-Post message to CSETim Wawrzynczak
2021-06-30soc/intel/tigerlake: Send End-of-Post message to CSETim Wawrzynczak
2021-06-30soc/intel/alderlake: Send End-of-Post message to CSETim Wawrzynczak
2021-06-30soc/intel/common/block/cse: Add BWG error recovery to EOP failureTim Wawrzynczak
2021-06-30soc/intel/elkhartlake: Enable PCH GBELean Sheng Tan
2021-06-30soc/intel/common: Refine pmc_get_xtal_freq functionLean Sheng Tan
2021-06-30soc/intel/common: Move PMC EPOC related code to Intel common codeLean Sheng Tan
2021-06-30src: Move `select ARCH_X86` to platformsAngel Pons
2021-06-30soc/amd/common/fsp/dmi.c: Fix Type 17 DMI reportingNikolai Vyssotski
2021-06-29soc/intel/tigerlake: Enable support for common IRQ blockTim Wawrzynczak
2021-06-29soc/intel/alderlake: Enable support for common IRQ blockTim Wawrzynczak
2021-06-29soc/intel/cannonlake: Use new IRQ moduleTim Wawrzynczak
2021-06-29soc/intel/cannonlake: Add some missing DEVFN macrosTim Wawrzynczak
2021-06-29soc/intel/common/irq: Add function to return IRQ for PCI devfnTim Wawrzynczak
2021-06-29soc/intel/common/irq: Internally cache PCI IRQ resultsTim Wawrzynczak
2021-06-29soc/intel/common/irq: Add function to program north PCI IRQsTim Wawrzynczak
2021-06-29soc/intel/common/block/irq: Add support for intel_write_pci0_PRTTim Wawrzynczak
2021-06-29soc/intel/common: Add new IRQ moduleTim Wawrzynczak
2021-06-29southbridge/intel/common: Move invalid PIRQ value to 0Tim Wawrzynczak
2021-06-28soc/amd/cezanne: Add call to mb to configure eSPI requirementsMartin Roth
2021-06-28soc/intel: Drop casts around `soc_read_pmc_base()`Angel Pons
2021-06-28xeon_sp/{cpx,skx}: Add config IFD_CHIPSET 'lbg'Johnny Lin
2021-06-26soc/mediatek/mt8195: Utilize the retry macroYu-Ping Wu
2021-06-26soc/intel/jasperlake: Select DISPLAY_FSP_VERSION_INFO_2Ronak Kanabar
2021-06-26soc/intel/cache_as_ram.S: Fix CAR issues with BootguardArthur Heymans
2021-06-25soc/intel/apollolake: Drop `xdci_can_enable()` callAngel Pons
2021-06-25soc/intel/alderlake: Fix the typo for FSP_S_CONFIG paramV Sowmya
2021-06-25soc/intel/apollolake/xdci.c: Use `dev` parameterAngel Pons
2021-06-25soc/intel/skylake: Use `devfn_disable()` to handle XDCIAngel Pons
2021-06-25soc/intel/skylake: Use `is_devfn_enabled()`Angel Pons
2021-06-25soc/intel/common/cse: Add support for sending CSE End-of-Post messageTim Wawrzynczak
2021-06-25soc/intel/alderlake: Update s0ix cstate tableBernardo Perez Priego
2021-06-24soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKEArthur Heymans
2021-06-24soc/intel/cache_as_ram.S: Add macro to detect bootguard nemArthur Heymans
2021-06-24soc/intel/alderlake: Update mainboard_memory_init_params() argumentSubrata Banik
2021-06-24soc/intel/alderlake: Refactor soc_silicon_init_params functionSubrata Banik
2021-06-24soc/intel/alderlake: Rename FSP_S_CONFIG variable from params to s_cfgSubrata Banik
2021-06-24soc/intel/alderlake: Refactor platform_fsp_silicon_init_params_cb functionSubrata Banik
2021-06-24soc/mediatek/mt8195: Support 4 channel DRAM in DPM init flowRyan Chuang