aboutsummaryrefslogtreecommitdiff
path: root/src/soc
AgeCommit message (Expand)Author
2015-08-21ChromeOS: Fix Kconfig dependenciesMartin Roth
2015-08-21soc/intel/common: CACHE_MRC_SETTINGS doesn't depend on HAVE_MRCMartin Roth
2015-08-19Skylake: update cbmem_topRizwan Qureshi
2015-08-19skylake: Update Memory and Silicon Init paramsRizwan Qureshi
2015-08-19skylake: correct IO-APIC redirection entry countAaron Durbin
2015-08-19skylake: add gpe.h for ASL generationAaron Durbin
2015-08-17Fix Kconfig: ALWAYS_LOAD_OPROM has unmet dependency VGA_ROM_RUNMartin Roth
2015-08-17soc/intel/skylake/Kconfig: Fix recursive Kconfig dependencyMartin Roth
2015-08-14skylake: fix SMI GPI status handlingAaron Durbin
2015-08-14skylake: enable SMI routed GPIsAaron Durbin
2015-08-14skylake: clarify and fix gpio macrosAaron Durbin
2015-08-14skylake: provide clarification for FADT gpe0_blk_lenAaron Durbin
2015-08-14skylake: remove ec_smi_gpio and alt_gp_smi_enAaron Durbin
2015-08-14skylake: provide GPE0 routing devicetree configurationAaron Durbin
2015-08-14skylake: remove IedSize from chip.hAaron Durbin
2015-08-14skylake: pass IED_REGION_SIZE Kconfig to FSPAaron Durbin
2015-08-14intel/common: fix stage_cache_external_region()Aaron Durbin
2015-08-14skylake: use smm_subregion() during SMM relocationAaron Durbin
2015-08-14intel/common: use external stage cache for fsp_ramstageAaron Durbin
2015-08-14skylake: clean up SMM region calculationsAaron Durbin
2015-08-14fsp1_1: fsp_relocate: use struct region_device and struct progAaron Durbin
2015-08-14Skylake: Add ASL code to enable GPIO controllerArchana Patni
2015-08-14intel/common: use acpi_is_wakeup_s3() in fsp_ramstage.cAaron Durbin
2015-08-14skylake: clear write-1-to-clear fields in power regsAaron Durbin
2015-08-14skylake: fix invalid GNVS base addressAaron Durbin
2015-08-14skylake: enumerate the SMI status fieldsAaron Durbin
2015-08-14skylake: set DISB in GEN_PMCON_A register properlyAaron Durbin
2015-08-14skylake: fill out gen_pmcon_* bitfieldsAaron Durbin
2015-08-14skylake: do not overlap resourcesAaron Durbin
2015-08-14skylake: use native gpio configuration for uartAaron Durbin
2015-08-14skylake: provide native gpio functionalityAaron Durbin
2015-08-13skylake: fix serial port with new code baseAaron Durbin
2015-08-13skylake: Add Deep Sx configuration for wake pinsDuncan Laurie
2015-08-13skylake: remove CBFS_SIZE option in SoC directoryAaron Durbin
2015-08-13skylake: fix garbled patch from upstreamAaron Durbin
2015-08-13soc/common/intel: Reset is not dependend upon FSPLee Leahy
2015-08-09samsung/exynos5250: Add vboot2 memory regionPatrick Georgi
2015-08-09imgtech/pistacho: Add vboot2 memory regionPatrick Georgi
2015-08-09license headers: Drop FSF addresses againPatrick Georgi
2015-08-08samsung/exynos5250: Enable bootblock consolePatrick Georgi
2015-08-08broadcom/cygnus: returning from verstage without having one is uselessPatrick Georgi
2015-07-29skylake: Update microcode reload in ramstage.Rizwan Qureshi
2015-07-29Skylake: Fix microcode reload in bootblock cpu initRizwan Qureshi
2015-07-29skylake: clean-up pei_datarobbie zhang
2015-07-29skylake: align power management names with hardwareAaron Durbin
2015-07-29skylake: provide pcr helper to get a port's register spaceAaron Durbin
2015-07-29skylake: prefix the gpio functions with 'gpio_'Aaron Durbin
2015-07-29skylake: remove unused types and definitions in gpio.hAaron Durbin
2015-07-29t210: lp0_resume: implement MBIST workaroundYen Lin
2015-07-29intel/braswell: fix buildJenny TC
2015-07-29BCRD2: Enable PMIC SVID configJenny TC
2015-07-29skylake: remove the redundant fspNotify in chip final.robbie zhang
2015-07-29skylake: Rework microcode include pathDuncan Laurie
2015-07-24skylake: Fix building without serial consoleDuncan Laurie
2015-07-24tegra210: Fix parameter order of write32()Stefan Reinauer
2015-07-24tegra lp0: fix checkpatch errorsStefan Reinauer
2015-07-23t210: audio: add CLK_V_EXTPERIPH1 clockYen Lin
2015-07-23t210: Enable WRAP to INCR burst type conversion in MSELECTYen Lin
2015-07-23t210: implement MBIST workaroundYen Lin
2015-07-23t210: lp0_resume: set CAR2PMC_CPU_ACK_WIDTH to 0Yen Lin
2015-07-23t210: change memlayout.ldYen Lin
2015-07-23intel: common: Let mainboard supplement FSP memory infoDuncan Laurie
2015-07-23intel/common: Add SMBIOS memory widthLee Leahy
2015-07-23skylake: sanitize pcr header for ACPI and assemblerAaron Durbin
2015-07-23skylake: provide more clarity for PCR accessAaron Durbin
2015-07-21intel/fsp_baytrail: Support Baytrail FSP Gold4 releaseYork Yang
2015-07-21t132: Correct dma_busy functionTom Warren
2015-07-21t210: Add tegra_lp0_resume codeYen Lin
2015-07-21t210: Correct device MMIO rangeJimmy Zhang
2015-07-21skylake: add global reset cause registers to power stateAaron Durbin
2015-07-21skylake: take into account deep s3 in power failure checkAaron Durbin
2015-07-21skylake: read out and report full width of gen_pmcon registersAaron Durbin
2015-07-21Glados: Update Serial IO modes in devicetreeNaveen Krishna Chatradhi
2015-07-21intel/skylake: support 32bit uart8250_mem driver in romstageNaveen Krishna Chatradhi
2015-07-21intel/common: remove printk in pre_console_init()rsatapat
2015-07-21Skylake: Initialize GPIOs for UART2rsatapat
2015-07-21Skylake: Only support UART2 as debug port, clean up the restNaveen Krishna Chatradhi
2015-07-21intel fsp: remove CHIPSET_RESERVED_MEM_BYTESAaron Durbin
2015-07-21Braswell: Remove GOP from normal boot mode.Abhay Kumar
2015-07-21skylake: re-enable PCIe L1 sub statesAaron Durbin
2015-07-21skylake: honor pcie root port settings already in chip.hAaron Durbin
2015-07-21skylake: Show SPI controller if enabled in devicetree.cbDuncan Laurie
2015-07-21braswell: clean up \_PR entriesJagadish Krishnamoorthy
2015-07-17soc/intel: Remove microcode terminatorsStefan Reinauer
2015-07-17skylake: remove whitespace from ASL filesStefan Reinauer
2015-07-16t210: new sdram_lp0_save_params() functionYen Lin
2015-07-16t210: correct odmdata location in bctYen Lin
2015-07-16t210: Reorganize memlayout.ldFurquan Shaikh
2015-07-16t210: SPI driver cleanupFurquan Shaikh
2015-07-16t210: Correct dma_busy functionFurquan Shaikh
2015-07-16t210: Add PINMUX macros for drive strengthFurquan Shaikh
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy
2015-07-14Braswell: Use CBFS image type nameLee Leahy
2015-07-14azalia: fix up and clean up shrinkage of boilerplate codeJonathan A. Kollasch
2015-07-13tegra124/tegra210: Include stages.h in bootblock.cStefan Reinauer
2015-07-13tegra210: Fix coding style in clock.cStefan Reinauer
2015-07-13t210: Apply A57 hardware issue workaround during cpu startupFurquan Shaikh
2015-07-13t210: Add TZDRAM_BASE param to BL31_MAKEARGSFurquan Shaikh
2015-07-12Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()Martin Roth
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-20 20:15:33 +0000