Age | Commit message (Expand) | Author |
2018-06-07 | mediatek: Move uart, timer and cbmem code to a common directory. | Tristan Shieh |
2018-06-07 | mediatek: Refactor to sharing code among similar SOCs | Tristan Shieh |
2018-06-07 | mediatek: Refine whitespace and formating changes | Tristan Shieh |
2018-06-06 | arch/x86: Always select RELOCATABLE_MODULES | Kyösti Mälkki |
2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
2018-06-06 | arch/x86: Flag platforms without RELOCATABLE_RAMSTAGE | Kyösti Mälkki |
2018-06-06 | soc/intel/common/block: Move i2c common functions into block/i2c | Subrata Banik |
2018-06-06 | soc/intel/common/block: Move gspi common functions into block/gspi | Subrata Banik |
2018-06-06 | soc/intel/common/block: Add common chip config block | Subrata Banik |
2018-06-06 | soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL | Subrata Banik |
2018-06-06 | soc/intel/common/pch: Make infrastructure ready for pch common code | Subrata Banik |
2018-06-06 | soc/intel/apollolake: Add missing entries to pmc_to_gpio_route for GLK | Furquan Shaikh |
2018-06-06 | soc/intel/apollolake: Fix macro name for GPIO_GPE_NW group 2 | Furquan Shaikh |
2018-06-05 | soc/intel/{apollolake, geminilake}: Add option to skip coreboot MP init | Subrata Banik |
2018-06-05 | soc/intel/cannonlake: Add option to skip coreboot MP init | Subrata Banik |
2018-06-05 | soc/intel/skylake: Add option to skip coreboot MP init | Subrata Banik |
2018-06-05 | soc/intel/skylake: Swap PCI devfn resides in same PCI device | Gaggery Tsai |
2018-06-04 | security/tpm: Unify the coreboot TPM software stack | Philipp Deppenwiese |
2018-06-04 | soc/dmp: Drop leftover file | Kyösti Mälkki |
2018-06-04 | soc/broadcom/cygnus: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | src/soc: Get rid of whitespace before tab | Elyes HAOUAS |
2018-06-04 | soc/imgtec/pistachio: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/marvell/mvmap2315: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/mediatek/mt8173: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/samsung: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/rockchip: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | src: Use "foo *bar" instead of "foo* bar" | Elyes HAOUAS |
2018-06-04 | soc/{amd,intel}: Use postcar_frame_add_romcache() | Nico Huber |
2018-06-04 | soc/intel/denverton_ns: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/intel/skylake: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/intel/apollolake: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/intel/braswell: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/intel/fsp_broadwell_de: Get rid of device_t | Elyes HAOUAS |
2018-06-04 | soc/intel/fsp_baytrail: Get rid of device_t | Elyes HAOUAS |
2018-06-03 | soc/intel/apollolake: Add Page table mapping for System Memory | Hannah Williams |
2018-06-02 | soc/intel/common: Add edge trigger configuartion for IOAPIC IRQ mode | Aamir Bohra |
2018-06-01 | soc/intel/cannonlake: Get rid of device_t | Elyes HAOUAS |
2018-06-01 | soc/intel/broadwell: Get rid of device_t | Elyes HAOUAS |
2018-06-01 | soc/amd/stoneyridge: Add ACPI device name lookup | Marc Jones |
2018-05-31 | soc/intel/broadwell: decouple PEI memory struct from coreboot header | Matt DeVillier |
2018-05-31 | soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) | Nico Huber |
2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
2018-05-31 | soc/intel/skylake: Select common P2SB code | Subrata Banik |
2018-05-30 | soc/intel/cannonlake: Enable IDT and expection handling support for all stages | Aamir Bohra |
2018-05-29 | src/soc: Add and update license headers | Martin Roth |
2018-05-28 | fsp_broadwell_de: Select TSC_MONOTONIC_TIMER by default | David Hendricks |
2018-05-28 | intel/skylake: nhlt: Update Max98373's capture format | Sathyanarayana Nujella |
2018-05-28 | soc/intel/quark: Get rid of device_t | Elyes HAOUAS |
2018-05-28 | soc/qualcomm: Get rid of device_t | Elyes HAOUAS |
2018-05-28 | soc/nvidia: Get rid of device_t | Elyes HAOUAS |
2018-05-27 | soc/intel/cannonlake: Select common XHCI code | Subrata Banik |
2018-05-27 | grunt: Wire up the EC SMI handler | Raul E Rangel |
2018-05-27 | amd: Don't call halt() when in SMM | Raul E Rangel |
2018-05-27 | stoneyridge GPIO: Create and use PAD_INT for interrupt pins | Richard Spiegel |
2018-05-25 | soc/amd/stoneyridge: Increment boot_count on non-S3 boots | Daniel Kurtz |
2018-05-25 | soc/amd/stoneyridge: Record ACPI Wake events in ELOG | Daniel Kurtz |
2018-05-25 | soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB | Subrata Banik |
2018-05-24 | soc/intel/baytrail: Get rid of device_t | Elyes HAOUAS |
2018-05-24 | src: Remove space after `defined` | Elyes HAOUAS |
2018-05-23 | mb/google/kahlee/dsdt.asl: Add method _SWS | Richard Spiegel |
2018-05-23 | stoneyridge: Store wake parameters in NVS | Richard Spiegel |
2018-05-23 | soc/amd/common/block/pci: Get rid of device_t | Elyes HAOUAS |
2018-05-23 | soc/amd/stoneyridge/: Get rid of device_t | Elyes HAOUAS |
2018-05-22 | soc/intel/apollolake: Bypass FSP's CpuMemorytest, PCIe pwr seq & SPI Init | Srinidhi N Kaushik |
2018-05-22 | soc/nvidia/tegra(124|210): Add distclean targets | Martin Roth |
2018-05-22 | amd/stoneyridge: Increase SMM reserved memory | Marshall Dawson |
2018-05-22 | src: Remove non-ascii characters | Martin Roth |
2018-05-22 | rk3399: Enable bootblock compression | Julius Werner |
2018-05-22 | bootblock: Allow more timestamps in bootblock_main_with_timestamp() | Julius Werner |
2018-05-19 | cpu/x86: Add support to run function on single AP | Subrata Banik |
2018-05-19 | soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE config | Subrata Banik |
2018-05-18 | soc/amd/stoneyridge: Support ACPI USB code generation | Duncan Laurie |
2018-05-18 | soc/intel: Add support for USB ACPI code generation | Duncan Laurie |
2018-05-17 | soc/intel/skylake: Fix AP timeout issue while executing sgx_configure | Subrata Banik |
2018-05-15 | soc/intel/skylake: check DPTF_TSR1_ACTIVE_AC* in _ACx methods | John Su |
2018-05-15 | soc/intel/apollolake: add rt5682 NHLT support | Naveen Manohar |
2018-05-14 | soc/intel/denverton_ns: Enable common code for CPU | Julien Viard de Galbert |
2018-05-14 | soc/intel/denverton_ns: port gpio to intelblock | Julien Viard de Galbert |
2018-05-14 | soc/intel/denverton_ns + mb: Rename gpio configuration | Julien Viard de Galbert |
2018-05-14 | cpu/x86: Add support to run function with argument over APs | Subrata Banik |
2018-05-14 | grunt: use stage cache when waking from S3 | Raul E Rangel |
2018-05-09 | drivers/intel/gma, soc/intel/common: improve cooperation | Patrick Georgi |
2018-05-09 | sdm845: Add DRAM resources | T Michael Turney |
2018-05-09 | vendorcode/amd/pi/00670F00: Control which procedure builds | Richard Spiegel |
2018-05-08 | amd/common/pi: Insert missing newline in printk | Marshall Dawson |
2018-05-08 | soc/intel/skylake: Support PCH UART 0 and 1 for console | Duncan Laurie |
2018-05-08 | soc/intel/fsp_broadwell_de: Spell verb *set up* with space | Paul Menzel |
2018-05-08 | soc/intel/denverton_ns: Fill dimm info for SMBIOS table 17 | Julien Viard de Galbert |
2018-05-08 | {mb,nb,soc}: Remove references to pci_bus_default_ops() | Nico Huber |
2018-05-08 | intel/broadwell: Add option to enable/disable the PCIe AER capability | Youness Alaoui |
2018-05-08 | intel/broadwell: If L1 Sub state is disabled, do not set capability | Youness Alaoui |
2018-05-05 | intel/acpi: Fix ACPI compile error | Lijian Zhao |
2018-05-05 | soc/intel/cannonlake: Include stage cache support for CNL | Subrata Banik |
2018-05-05 | soc/intel: Add KBL-R pci id support | Lijian Zhao |
2018-05-05 | fsp_broadwell_de: Add option to enable EHCI controllers | David Hendricks |
2018-05-04 | soc/intel/common: Allow exporting the size of the VBT | Patrick Georgi |
2018-05-04 | soc/intel: unify VBT fetching API | Patrick Georgi |
2018-05-04 | soc/amd/stonyridge: Add misc device | Akshu Agrawal |
2018-05-04 | ifdtool: Add a list of known platforms that support IFD_VERSION_2 | Furquan Shaikh |
2018-05-04 | soc/amd/stoneyridge: Remove USB30PortInit setting | Martin Roth |