coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2015-04-08	tegra132: Change all SoC headers to <soc/headername.h> system	Julius Werner
	This patch aligns tegra132 to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Rush_Ryu. Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591 Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224505 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9369 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24	tegra132: provide pad configuration interface	Aaron Durbin
	Instead of sprinkling the pad configuration and pinmux selection throughout the code allow for a data-driven initialization sequence. Most of the calls in the original pinmux functions require 12 bytes per pad plus the support code. This implementation allows for 4 bytes per pad in addition to the support code. BUG=chrome-os-partner:29981 TEST=Built and booted into depthcharge on rush. Change-Id: I22c243a5f9891a97e14b78d8c8064e36adaf50b8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9329c17bbadcaab803b38842e38e1704d262817d Original-Change-Id: I3a119b4068e880b74a0a1597f143d7c4e108a6c1 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/210833 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8875 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>