diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-07-31 14:54:12 -0500 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-24 15:27:40 +0100 |
commit | 401b3b6ea66731c3d665659d869ed06008db19e6 (patch) | |
tree | 4829aa08420e52d0956e1e10531324f054d1c9f7 /src/soc/nvidia/tegra132/padconfig.c | |
parent | aee84263363e4fdc2b7e4762f0b4c7c68a48bea1 (diff) |
tegra132: provide pad configuration interface
Instead of sprinkling the pad configuration and pinmux
selection throughout the code allow for a data-driven
initialization sequence. Most of the calls in the
original pinmux functions require 12 bytes per pad
plus the support code. This implementation allows for
4 bytes per pad in addition to the support code.
BUG=chrome-os-partner:29981
TEST=Built and booted into depthcharge on rush.
Change-Id: I22c243a5f9891a97e14b78d8c8064e36adaf50b8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9329c17bbadcaab803b38842e38e1704d262817d
Original-Change-Id: I3a119b4068e880b74a0a1597f143d7c4e108a6c1
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210833
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8875
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/padconfig.c')
-rw-r--r-- | src/soc/nvidia/tegra132/padconfig.c | 138 |
1 files changed, 138 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/padconfig.c b/src/soc/nvidia/tegra132/padconfig.c new file mode 100644 index 0000000000..621898d2f7 --- /dev/null +++ b/src/soc/nvidia/tegra132/padconfig.c @@ -0,0 +1,138 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + +#include <arch/io.h> +#include <soc/addressmap.h> +#include <soc/padconfig.h> + +static uint32_t * const pinmux_regs = (void *)(uintptr_t)TEGRA_APB_PINMUX_BASE; +static struct gpio_bank * const gpio_regs = (void *)(uintptr_t)TEGRA_GPIO_BASE; + +static inline struct gpio_bank * const get_gpio_bank_regs(int index) +{ + return &gpio_regs[gpio_index_to_bank(index)]; +} + +static inline uint32_t pad_get_pinmux(int index) +{ + return read32(&pinmux_regs[index]); +} + +static inline void pad_set_pinmux(int index, uint32_t reg) +{ + return write32(reg, &pinmux_regs[index]); +} + +static inline void pad_set_gpio_out(int gpio_index, int val) +{ + struct gpio_bank * const regs = get_gpio_bank_regs(gpio_index); + int port = gpio_index_to_port(gpio_index); + int bit = gpio_to_bit(gpio_index); + + write32((1 << (bit + GPIO_GPIOS_PER_PORT)) | (val << bit), + ®s->out_value_mask[port]); + write32((1 << (bit + GPIO_GPIOS_PER_PORT)) | (1 << bit), + ®s->out_enable_mask[port]); +} + +static inline void pad_set_mode(int gpio_index, int sfio_or_gpio) +{ + struct gpio_bank * const regs = get_gpio_bank_regs(gpio_index); + int port = gpio_index_to_port(gpio_index); + int bit = gpio_to_bit(gpio_index); + + write32((1 << (bit + GPIO_GPIOS_PER_PORT)) | (sfio_or_gpio << bit), + ®s->config_mask[port]); +} + +static inline void pad_set_gpio_mode(int gpio_index) +{ + pad_set_mode(gpio_index, 1); +} + +static inline void pad_set_sfio_mode(int gpio_index) +{ + pad_set_mode(gpio_index, 0); +} + +static void configure_unused_pad(const struct pad_config * const entry) +{ + uint32_t reg; + + /* + * Tristate the pad and disable input. If power-on-reset state is a + * pullup maintain that. Otherwise enable pulldown. + */ + reg = pad_get_pinmux(entry->pinmux_index); + reg &= ~PINMUX_INPUT_ENABLE; + reg |= PINMUX_TRISTATE; + reg &= ~PINMUX_PULL_MASK; + if (entry->por_pullup) + reg |= PINMUX_PULL_UP; + else + reg |= PINMUX_PULL_DOWN; + pad_set_pinmux(entry->pinmux_index, reg); + + /* + * Set to GPIO mode if GPIO available to bypass collisions of + * controller signals going to more than one pad. + */ + if (entry->pad_has_gpio) + pad_set_gpio_mode(entry->gpio_index); +} + +static void configure_sfio_pad(const struct pad_config * const entry) +{ + pad_set_pinmux(entry->pinmux_index, entry->pinmux_flags); + pad_set_sfio_mode(entry->gpio_index); +} + +static void configure_gpio_pad(const struct pad_config * const entry) +{ + uint32_t reg; + + if (entry->gpio_out0 || entry->gpio_out1) + pad_set_gpio_out(entry->gpio_index, entry->gpio_out1 ? 1 : 0); + + /* Keep the original SFIO selection. */ + reg = pinmux_get_config(entry->pinmux_index); + reg &= PINMUX_FUNC_MASK; + reg |= entry->pinmux_flags; + + pad_set_pinmux(entry->pinmux_index, reg); + pad_set_gpio_mode(entry->gpio_index); +} + +void soc_configure_pads(const struct pad_config * const entries, size_t num) +{ + size_t i; + + for (i = 0; i < num; i++) { + const struct pad_config * const entry = &entries[i]; + + if (entry->unused) { + configure_unused_pad(entry); + } else if (entry->sfio) { + configure_sfio_pad(entry); + } else { + configure_gpio_pad(entry); + } + } +} |