index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
nvidia
/
tegra124
/
display.c
Age
Commit message (
Expand
)
Author
2016-04-07
edid: Make framebuffer row alignment configurable
Julius Werner
2016-03-24
edid: Add helper function to calculate bits-per-pixel dependent values
Julius Werner
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-21
arm(64): Globally replace writel(v, a) with write32(a, v)
Julius Werner
2015-04-08
tegra124: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-01-04
tegra124: configure DP with correct pixel clock
Vince Hsu
2014-12-30
tegra124: display clock should be initialized before any access
Vince Hsu
2014-12-17
tegra124: modify panel init sequence
Ken Chang
2014-12-17
tegra124: change PLLD VCO calculation algorithm
Ken Chang
2014-12-16
tegra124: Initialize display panel by EDID.
Hung-Te Lin
2014-12-15
tegra124: Setup clock PLLD by approximating display panel pixel clock.
Hung-Te Lin
2014-11-14
t124: Clean up display init functions
Jimmy Zhang
2014-11-12
tegra124: Program PWM1 to drive panel backlight
Andrew Chew
2014-11-12
tegra124: nyan: Keep in memory structures below 4GB.
Gabe Black
2014-10-22
tegra/nyan*: sdram updates
Tom Warren
2014-09-22
tegra124/nyan: memory and display updates
Andrew Bresticker
2014-09-13
tegra124/nyan: display, clock, and other updates
Julius Werner
2014-09-12
tegra124/nyan: various fixes and additions
Hung-Te Lin
2014-09-11
tegra124/nyan: rougly stable code base
Gabe Black