summaryrefslogtreecommitdiff
path: root/src/soc/intel
AgeCommit message (Expand)Author
2021-01-28soc/intel/xeon_sp/skx: Add soc_acpi_nameMarc Jones
2021-01-28ACPI: Separate ChromeOS NVS in ASLKyösti Mälkki
2021-01-28ACPI: Declare GNVS variables globallyKyösti Mälkki
2021-01-28arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limitsKyösti Mälkki
2021-01-28soc/intel: Refactor acpi_wake_source()Kyösti Mälkki
2021-01-28soc/intel: Refactor fill_acpi_wake()Kyösti Mälkki
2021-01-27soc/intel/alderlake: Generate LP4x SPD files using gen_spd.goAmanda Huang
2021-01-27ACPI: Separate device_nvs_tKyösti Mälkki
2021-01-26soc/intel/braswell/romstage/romstage.c: Use __func__Elyes HAOUAS
2021-01-26soc/intel/xeon_sp/acpi.c: Add ACPI C-State tableMarc Jones
2021-01-26soc/intel: Move c-state resource defineMarc Jones
2021-01-26sb,soc/intel: Refactor power_on_after_fail optionKyösti Mälkki
2021-01-25soc/intel/denverton_ns: Drop unused `pattrs.h`Angel Pons
2021-01-25soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driverFurquan Shaikh
2021-01-25sb,soc/intel: Remove no-op APMC for C-state and P-stateKyösti Mälkki
2021-01-25cpu/x86/smm: Use common APMC loggingKyösti Mälkki
2021-01-25soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner
2021-01-25soc/intel/lpc_lib: mirror LPC registers to DMI when requiredMichael Niewöhner
2021-01-25soc/intel/xeon_sp/cpx: Fix loading MCU on APsArthur Heymans
2021-01-25soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driverFurquan Shaikh
2021-01-25soc/intel/common: Add support for populating meminit dataFurquan Shaikh
2021-01-25soc/intel/tigerlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGDBora Guvendik
2021-01-24soc/intel/broadwell: Improve LPD0/LPD3 SerialIO ACPI methodsAngel Pons
2021-01-24soc/intel/broadwell: Drop enable check from LPD0/LPD3Angel Pons
2021-01-24soc/intel/quark/gpio_i2c.c: Use __func__Elyes HAOUAS
2021-01-24soc/intel/denverton_ns/pmc.c: Use __func__Elyes HAOUAS
2021-01-24soc/intel/denverton_ns/npk.c: Use __func__Elyes HAOUAS
2021-01-24soc/intel/denverton_ns/lpc.c: Use __func__Elyes HAOUAS
2021-01-24soc/intel/xeon_sp/cpx: Account for 'rc' heap managerArthur Heymans
2021-01-24soc/intel/lpc_lib: drop dead codeMichael Niewöhner
2021-01-24soc/intel/icl: drop wrong, unused codeMichael Niewöhner
2021-01-24soc/intel/cnl: use Kconfig to determine PCH typeMichael Niewöhner
2021-01-24soc/intel/broadwell: Align raminit with HaswellAngel Pons
2021-01-24soc/intel/broadwell: Drop `struct romstage_params`Angel Pons
2021-01-24broadwell: Flatten `mainboard_pre_raminit`Angel Pons
2021-01-24broadwell: Clean up `mainboard_post_raminit`Angel Pons
2021-01-24soc/intel/broadwell/chip.h: Drop unused fieldsAngel Pons
2021-01-24soc/intel/broadwell: Select CPU_INTEL_HASWELLAngel Pons
2021-01-24soc/intel/broadwell: Move romstage.c to HaswellAngel Pons
2021-01-24soc/intel/broadwell: Drop now-unused CPU codeAngel Pons
2021-01-24soc/intel/broadwell: Use Haswell CPU headersAngel Pons
2021-01-24soc/intel/broadwell: Allow to use Haswell CPU code insteadAngel Pons
2021-01-24soc/intel/broadwell: Select INTEL_LYNXPOINT_LPAngel Pons
2021-01-23soc/intel/baytrail,broadwell: Use bootstate for save_wake_source()Kyösti Mälkki
2021-01-23ACPI: Add helpers for CBMEM_ID_POWER_STATEKyösti Mälkki
2021-01-23intel/baytrail,braswell,broadwell: Add const qualifier for power_stateKyösti Mälkki
2021-01-23ELOG: Add const qualifier for chipset_power_stateKyösti Mälkki
2021-01-23soc/intel/cometlake: Add ucode for CML-HTim Crawford
2021-01-23soc/intel/apl: drop LPC pad configuration codeMichael Niewöhner
2021-01-22soc/intel/alderlake: Adding Kconfig for ADL_M PCHVarshit Pandya
2021-01-22soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya
2021-01-22soc/intel/baytrail,broadwell: Refactor acpi_wake_source()Kyösti Mälkki
2021-01-21soc/intel/quark: Add pwrs in <soc/nvs.h>Kyösti Mälkki
2021-01-21soc/intel/cannonlake: Allow RP#1 usage for ClkSrcJeremy Soller
2021-01-21soc/intel/common/pcie_rp.h: Fix comment styleFurquan Shaikh
2021-01-21soc/intel/alderlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGDSubrata Banik
2021-01-21soc/intel/common/graphics: Add new Kconfig SOC_INTEL_DISABLE_IGDSubrata Banik
2021-01-20soc/intel: fix indentation in intelblocks/lpc_lib.hMichael Niewöhner
2021-01-20soc/intel/*: drop broken LPC mmio codeMichael Niewöhner
2021-01-20ACPI GNVS: Drop most dev_count_cpu()Kyösti Mälkki
2021-01-19intel/xeon_sp, mb/ocp/deltalake: Rework get_stack_busnos()Maxim Polyakov
2021-01-18ACPI: Refactor ChromeOS specific ACPI GNVSKyösti Mälkki
2021-01-18soc/intel/braswell/chip.c: Use __func__Elyes HAOUAS
2021-01-18soc/intel/xeon_sp/uncore.c: Remove duplicated includeElyes HAOUAS
2021-01-18soc/intel/xeon_sp/skx/soc_acpi.c: Remove duplicated includeElyes HAOUAS
2021-01-18soc/intel/broadwell/bootblock.c: Remove repeated wordElyes HAOUAS
2021-01-18soc/intel/common/block/include/intelblocks/pmc_ipc.h: Remove repeated wordElyes HAOUAS
2021-01-18soc/intel/common/block/itss/itss.c: Remove repeated wordElyes HAOUAS
2021-01-18soc/intel/skylake/chip.h: Remove repeated wordElyes HAOUAS
2021-01-18soc/intel/alderlake: Update PCH and CPU PCIe RP tableEric Lai
2021-01-18soc/intel/common: Move L1_substates_control to pcie_rp.hEric Lai
2021-01-18soc/intel/common/pcie: Allow pcie_rp_group table to be non-contiguousFurquan Shaikh
2021-01-15soc/intel/braswell: Prevent NULL pointer dereferenceAngel Pons
2021-01-15cpu/x86/mpinit: Serialize microcode updates for HT threadsPatrick Rudolph
2021-01-14soc/intel/tgl: Add configurable value for UsbTcPortEnBrandon Breitenstein
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-13ACPI: Have single call-site for acpi_inject_nvsa()Kyösti Mälkki
2021-01-13ACPI: Add common acpi_fill_gnvs()Kyösti Mälkki
2021-01-13soc/intel/tigerlake: Disable TC cold supportSrinidhi N Kaushik
2021-01-12soc/intel: rename uart_max_indexMichael Niewöhner
2021-01-12soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE`Angel Pons
2021-01-12soc/intel/common/pcie: Add helper function for getting mask of enabled portsFurquan Shaikh
2021-01-12soc/intel/alderlake: Add PCH ID 0x5182Subrata Banik
2021-01-11soc/intel/{icl,tgl,jsl,ehl}: add LPIT supportMichael Niewöhner
2021-01-11soc/intel/skl: add SLP_S0 residency register and enable LPIT supportMichael Niewöhner
2021-01-11soc/intel/cnl: add SLP_S0 residency register and enable LPIT supportMichael Niewöhner
2021-01-11acpi,soc/intel/common: add support for Intel Low Power Idle TableMichael Niewöhner
2021-01-11{soc,vc,mb}/intel: Drop support for Cannon Lake SoCFelix Singer
2021-01-11soc/intel/common/uart: Use simple(_s_) variants of PCI functionsFurquan Shaikh
2021-01-11soc/intel/uart: Drop SoC callback `soc_uart_console_to_device`Furquan Shaikh
2021-01-11soc/intel/cnl: Allow setting PCIe subsystem IDs after FSP-SJeremy Soller
2021-01-11soc/intel/cannonlake: Enable wake from USB in S4Patrick Rudolph
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2021-01-10soc/intel/broadwell: Use `mp_cpu_bus_init`Angel Pons
2021-01-10mb/google/cyan: Move board_id() to mainboard_fill_gnvs()Kyösti Mälkki
2021-01-10ACPI: Add missing include in nvs.hKyösti Mälkki
2021-01-10soc/intel: Rename to soc_fill_gnvs()Kyösti Mälkki
2021-01-10soc/intel: Replace acpi_init_gnvs()Kyösti Mälkki
2021-01-10mb/x/acpi_tables: Rename to mainboard_fill_gnvs()Kyösti Mälkki
2021-01-10sb/intel: Factor out soc_fill_gnvs()Kyösti Mälkki