Age | Commit message (Expand) | Author |
---|---|---|
2020-06-04 | soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration | Jonathan Zhang |
2020-06-02 | soc/intel/xeon_sp: Early programming of ACPI bar | Rocky Phagura |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-11 | soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX | Michael Niewöhner |
2020-05-06 | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi |
2020-05-06 | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi |
2020-05-01 | soc/intel/xeon_sp: Add C620 p2sb.h | Andrey Petrov |
2020-04-07 | soc/intel/xeon_sp: Add Lewisburg defs for common/gpio driver | Maxim Polyakov |
2020-03-26 | soc/intel/xeon_sp: Refactor code to allow for additional CPUs types | Andrey Petrov |
2020-03-25 | soc/intel/xeon_sp: Enable LPC generic IO decode range | Johnny Lin |
2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
2020-03-06 | soc/intel: Add Intel Xeon Scalable Processor support | Jonathan Zhang |