coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-08-18	xeon_sp/cpx: Enable ACPI P-state support	Jingle Hsu
2020-08-13	soc/intel/xeon_sp/cpx: add CPUID for CPX-SP A1 processor	Jonathan Zhang
2020-08-11	xeon_sp/cpx: Enable PCH thermal device via FSP	Johnny Lin
2020-07-21	soc/intel/xeon_sp/cpx: remove unused gpio.h	Maxim Polyakov
2020-07-12	soc/intel/xeon_sp/cpx: use HOB_TYPE_GUID_EXTENSION to interpret platform HOBs	Jonathan Zhang
2020-07-04	soc/intel/xeon_sp: Add read CPU PPIN MSR function	Johnny Lin
2020-06-30	ACPI: Drop typedef global_nvs_t	Kyösti Mälkki
2020-06-28	soc/xeon_sp/cpx: Define MSR PPIN related registers	Johnny Lin
2020-06-25	soc/intel/xeon_sp/cpx: display UPDs and CPX-SP specific HOBs	Jonathan Zhang
2020-06-22	soc/intel/xeon_sp/cpx: rename xeon_sp_get_cpu_count()	Jonathan Zhang
2020-06-22	soc/intel/xeon_sp/cpx: Finalize PCU configuration	Jonathan Zhang
2020-06-14	soc/intel/xeon_sp/cpx: fix MADT ACPI table	Jonathan Zhang
2020-06-14	soc/intel/xeon_sp/cpx: add NUMA ACPI tables	Jonathan Zhang
2020-06-06	soc/intel/xeon_sp/cpx: set up cpus	Jonathan Zhang
2020-06-04	soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration	Jonathan Zhang
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-11	soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX	Michael Niewöhner
2020-04-04	soc/intel/xeon_sp/cpx: Add multi-core init	Andrey Petrov
2020-03-26	soc/intel/xeon_sp: Add basic Cooperlake-SP support	Andrey Petrov