coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-03-01	soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol	Sean Rhodes
2023-02-09	Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT"	Felix Singer
2023-02-08	device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT	Sean Rhodes
2023-02-08	soc/intel/{tgl,adl}/acpi: Unify the way D3Cold is enabled	Sean Rhodes
2023-01-08	soc/intel/alderlake/acpi: Add Kconfig options for SCM and FCM	Sean Rhodes
2022-12-10	soc/intel: Move TCSS FW latency macros to IA common tcss.h	Subrata Banik
2022-12-10	soc/intel/tigerlake: Move TCSS FW latency macros to tcss.h	Subrata Banik
2022-03-07	soc/intel/tigerlake: Hide PMC and IOM devices	Michał Kopeć
2021-11-15	soc/intel/tigerlake: Add config option for S3 ACPI	Sean Rhodes
2021-11-15	soc/intel/tigerlake/apci: Only use SCM for ChromeOS	Sean Rhodes
2021-10-05	src/soc to src/superio: Fix spelling errors	Martin Roth
2020-08-18	src: Remove unneded whitespace before tab	Elyes HAOUAS
2020-07-26	src: Remove extra lines in license header	Elyes HAOUAS
2020-07-12	soc/intel/tigerlake: Configure Type-C Input Output Manager(IOM) device	John Zhao
2020-07-01	soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4	John Zhao
2020-06-24	soc/intel/tigerlake: Fix unresolved symbol CDW1 error	John Zhao
2020-06-19	soc/intel/tigerlake: Update TCSS for SW CM support	John Zhao
2020-06-10	soc/intel/tigerlake: Add Hot-Plug and PME event handlers for Thunderbolt	John Zhao
2020-05-26	soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method	John Zhao
2020-05-18	soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method	John Zhao
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-22	soc/intel/tigerlake: Configure TCSS power management	John Zhao