| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-03-03 | src/soc/tigerlake: Add memory configuration support for Jasper Lake | Meera Ravindranath |
| 2020-02-09 | soc/intel/tigerlake: add memory configuration support | Nick Vaccaro |
| 2020-01-13 | soc/intel/tigerlake: Select correct fsp_param as per SoC Kconfig | Maulik V Vaghela |
| 2019-12-02 | soc/intel/tigerlake: Change compilation based on TIGERLAKE_BASE | Maulik V Vaghela |
| 2019-11-09 | soc/intel/tigerlake: Do initial SoC commit till ramstage | Subrata Banik |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |