diff options
| author | Meera Ravindranath <meera.ravindranath@intel.com> | 2020-02-26 22:26:17 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-03-03 04:07:39 +0000 |
| commit | eaba79cc66176ed9d9be23bce122b9d7bc238ed6 (patch) | |
| tree | 5f7856d780df75b42cc5271cfe30ea45f5d8dd85 /src/soc/intel/tigerlake/Makefile.inc | |
| parent | 528ae9e811939c5e453c57aea79bc420a5f5fc43 (diff) | |
src/soc/tigerlake: Add memory configuration support for Jasper Lake
BUG=none
BRANCH=none
TEST=Build and verify boot of WaddleDoo.
Change-Id: I8de502d3f05d52b9dae34e3b013c6d5b1896fa85
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Diffstat (limited to 'src/soc/intel/tigerlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/tigerlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 56119f50db..89ef877db2 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -26,6 +26,7 @@ bootblock-y += p2sb.c romstage-y += espi.c romstage-y += gpio.c romstage-$(CONFIG_SOC_INTEL_TIGERLAKE) += meminit_tgl.c +romstage-$(CONFIG_SOC_INTEL_JASPERLAKE) += meminit_jsl.c romstage-y += reset.c ramstage-y += acpi.c |