Age | Commit message (Expand) | Author |
2021-02-15 | soc/intel: Remove unused <console/console.h> | Elyes HAOUAS |
2021-02-15 | soc/intel/*: Move prmrr_core_configure | Patrick Rudolph |
2021-02-11 | ACPI: Move PICM declaration | Kyösti Mälkki |
2021-02-11 | sb,soc/intel: Drop OSYS from GNVS | Kyösti Mälkki |
2021-02-11 | mainboards: Drop PWRS from GNVS | Kyösti Mälkki |
2021-02-11 | src: Remove unused <arch/cpu.h> | Elyes HAOUAS |
2021-02-10 | soc/intel/skylake: Convert to ASL 2.0 syntax | Elyes HAOUAS |
2021-02-10 | soc/intel/skylake/acpi: Add PEP table | Benjamin Doron |
2021-02-10 | soc/intel/{cnl,skl}: Add alignment check for TSEG base and size | Benjamin Doron |
2021-02-09 | soc/amd,intel: Drop s3_resume parameter on FSP-S functions | Kyösti Mälkki |
2021-02-09 | drivers/intel/fsp1_1,fsp2_0: Refactor logo display | Kyösti Mälkki |
2021-02-08 | soc/intel/braswell,skylake: Drop logo parameters from devicetree | Kyösti Mälkki |
2021-02-08 | soc/intel: Drop CID1 from GNVS | Kyösti Mälkki |
2021-02-05 | soc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment | Elyes HAOUAS |
2021-02-01 | soc/intel/skylake/Kconfig: Remove duplicated INTEL_DESCRIPTOR_MODE_CAPABLE | Elyes HAOUAS |
2021-02-01 | src: Remove unused <cpu/x86/smm.h> | Elyes HAOUAS |
2021-01-31 | soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK | Michael Niewöhner |
2021-01-30 | soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options | Angel Pons |
2021-01-29 | soc/intel: Remove duplicate call to acpi_wake_source() | Kyösti Mälkki |
2021-01-29 | soc/intel: Drop CMEM from GNVS | Kyösti Mälkki |
2021-01-28 | ACPI: Separate ChromeOS NVS in ASL | Kyösti Mälkki |
2021-01-28 | ACPI: Declare GNVS variables globally | Kyösti Mälkki |
2021-01-28 | arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits | Kyösti Mälkki |
2021-01-28 | soc/intel: Refactor fill_acpi_wake() | Kyösti Mälkki |
2021-01-25 | soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring | Michael Niewöhner |
2021-01-23 | ACPI: Add helpers for CBMEM_ID_POWER_STATE | Kyösti Mälkki |
2021-01-23 | ELOG: Add const qualifier for chipset_power_state | Kyösti Mälkki |
2021-01-20 | soc/intel/*: drop broken LPC mmio code | Michael Niewöhner |
2021-01-20 | ACPI GNVS: Drop most dev_count_cpu() | Kyösti Mälkki |
2021-01-18 | ACPI: Refactor ChromeOS specific ACPI GNVS | Kyösti Mälkki |
2021-01-18 | soc/intel/skylake/chip.h: Remove repeated word | Elyes HAOUAS |
2021-01-13 | ACPI: Have single call-site for acpi_inject_nvsa() | Kyösti Mälkki |
2021-01-13 | ACPI: Add common acpi_fill_gnvs() | Kyösti Mälkki |
2021-01-12 | soc/intel: rename uart_max_index | Michael Niewöhner |
2021-01-11 | soc/intel/skl: add SLP_S0 residency register and enable LPIT support | Michael Niewöhner |
2021-01-11 | soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` | Furquan Shaikh |
2021-01-10 | ACPI: Add missing include in nvs.h | Kyösti Mälkki |
2021-01-10 | soc/intel: Rename to soc_fill_gnvs() | Kyösti Mälkki |
2021-01-10 | ACPI: Replace uses of CBMEM_ID_ACPI_GNVS | Kyösti Mälkki |
2021-01-10 | ACPI: Drop redundant ChromeOS setup for GNVS | Kyösti Mälkki |
2021-01-10 | ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS | Kyösti Mälkki |
2021-01-10 | ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations | Kyösti Mälkki |
2021-01-08 | soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range() | Furquan Shaikh |
2021-01-06 | soc/intel/skylake: Move MAX_CPUS from mb to SoC | Felix Singer |
2021-01-04 | arch/x86: Pass GNVS as parameter to SMM module | Kyösti Mälkki |
2021-01-03 | soc/intel: Drop indirect <soc/nvs.h> include | Kyösti Mälkki |
2021-01-01 | nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings | Michael Niewöhner |
2020-12-31 | soc/intel/skylake: Remove device_nvs.h | Kyösti Mälkki |
2020-12-30 | drivers/intel/gma: Include gfx.asl by default for all platforms... | Matt DeVillier |
2020-12-30 | soc/intel: hook up new gpio device in the soc chips | Michael Niewöhner |
2020-12-29 | soc/intel/skylake: Add 4 missing root ports to chipset dt | Felix Singer |
2020-12-28 | soc/intel/skylake: Enable CHAP device depending on devicetree | Benjamin Doron |
2020-12-25 | ACPI: Fix some GNVS field comments | Kyösti Mälkki |
2020-12-25 | sb,soc/intel: Fix GNVS OperationRegion | Kyösti Mälkki |
2020-12-25 | soc/intel/common/gfx: rename and guard graphics_soc_init() | Matt DeVillier |
2020-12-17 | soc/intel/skylake: Drop duplicate PmConfigPciClockRun configuration | Benjamin Doron |
2020-12-14 | soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option | Shreesh Chhabbi |
2020-12-14 | soc/intel/skylake: Drop always-zero ProbelessTrace dt setting | Angel Pons |
2020-12-14 | soc/intel/skylake: Drop always-zero PowerLimit4 dt setting | Angel Pons |
2020-12-14 | soc/intel/skylake: Drop never-set DdrFreqLimit dt setting | Angel Pons |
2020-12-14 | soc/intel/skylake: Drop unreferenced PttSwitch dt setting | Angel Pons |
2020-12-14 | soc/intel/skylake: Drop unreferenced devicetree settings | Angel Pons |
2020-12-11 | soc/intel/common/block/lpc: Move southbridge_write_acpi_tables declaration | Marc Jones |
2020-12-10 | soc/intel/common: Adapt XHCI elog driver for reuse | Tim Wawrzynczak |
2020-12-09 | soc/intel/common/dmi: Move DMI defines into DMI driver header | Srinidhi N Kaushik |
2020-12-08 | soc/intel/skylake: Shorten SATA mode enum value names | Felix Singer |
2020-12-08 | soc/intel/skylake: Restore alphabetical order of Kconfig selects | Felix Singer |
2020-12-07 | soc/intel/skl: set PEG port state to auto | Michael Niewöhner |
2020-12-04 | soc/intel/{skl,cnl}: add NMI_{EN,STS} registers | Michael Niewöhner |
2020-12-04 | soc/intel/common/block/gpio: add code for NMI enabling | Michael Niewöhner |
2020-12-03 | soc/intel/skylake: Add chipset devicetree | Felix Singer |
2020-12-03 | src: Remove redundant use of ACPI offset(0) | Elyes HAOUAS |
2020-12-02 | soc/intel/skylake: Fix compilation under x86_64 | Patrick Rudolph |
2020-12-02 | soc/intel/skylake: Map VBIOS IDs | Paul Menzel |
2020-11-30 | soc/intel/skylake: Fix comment | Felix Singer |
2020-11-29 | soc/intel: Configure P2SB before other PCH controllers | Furquan Shaikh |
2020-11-28 | soc/intel/skl: correct OC pin skip value for disabled usb ports | Michael Niewöhner |
2020-11-24 | soc/intel/skylake: Support NHLT 1ch DMIC | Benjamin Doron |
2020-11-24 | soc/intel/skylake: Use correct NHLT_PDM_DEV definition | Benjamin Doron |
2020-11-22 | soc/intel/block/pmc: Only include the PCI driver when it is not hidden | Arthur Heymans |
2020-11-13 | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner |
2020-11-13 | soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling | Michael Niewöhner |
2020-11-09 | soc/intel/skylake: Enable PCH thermal depending on devicetree | Benjamin Doron |
2020-11-04 | soc/intel/skl,acpi/acpigen: convert global CPPC package to local one | Michael Niewöhner |
2020-11-02 | soc/intel: Use of common reset code block | Subrata Banik |
2020-10-28 | soc/intel: deduplicate ACPI timer emulation | Michael Niewöhner |
2020-10-26 | mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` | Michael Niewöhner |
2020-10-26 | soc/intel/skl: replace conditional on dt option reading CPUID for CPPC | Michael Niewöhner |
2020-10-26 | soc/intel: drop unneeded ISST configuration code | Michael Niewöhner |
2020-10-26 | src: Include <arch/io.h> when appropriate | Elyes HAOUAS |
2020-10-24 | {cpu,soc}/intel: deduplicate cpu code | Michael Niewöhner |
2020-10-21 | {cpu,soc}/intel: replace AES-NI locking by common implemenation call | Michael Niewöhner |
2020-10-21 | soc/intel,mb/*: get rid of legacy pad macros | Michael Niewöhner |
2020-10-21 | soc/intel: convert XTAL frequency constant to Kconfig | Michael Niewöhner |
2020-10-21 | soc/intel/common: add Kconfig for PM Timer emulation support | Michael Niewöhner |
2020-10-19 | soc/intel/*: drop useless XTAL shutdown qualification code | Michael Niewöhner |
2020-10-19 | soc/intel/skylake: Do not let FSP set the subsystem IDs | Benjamin Doron |
2020-10-17 | cpu/intel,soc/intel: drop Kconfig for hyperthreading | Michael Niewöhner |
2020-10-16 | soc/intel/skylake: Rename PcieRpAspm devicetree config | Benjamin Doron |
2020-10-15 | soc/intel/skylake: Configure L1 substates for PCH root ports | Benjamin Doron |