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path: root/src/soc/intel/cannonlake
AgeCommit message (Expand)Author
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-09-25soc/intel: Use ASL 2.0 syntax for GPIO ASL helper functionSubrata Banik
2020-09-24soc/intel/cnl: drop lpit.asl in favor of common versionMichael Niewöhner
2020-09-22Revert "soc/intel: Refactor do_global_reset() function"Furquan Shaikh
2020-09-21src/soc/intel: Drop unneeded empty linesElyes HAOUAS
2020-09-21soc/intel: Refactor do_global_reset() functionSubrata Banik
2020-09-21soc/intel: rename get_prmrr_sizeMichael Niewöhner
2020-09-21soc/intel/cnl: Use the common code to set the PchPmPwrCycDurV Sowmya
2020-09-19soc/intel/common/block/cse: Refactor cse_request_global_reset() functionSubrata Banik
2020-09-17soc/intel/cannonlake: add missing special function padsMichael Niewöhner
2020-09-17soc/intel/cannonlake: rename "RSVD" GPIOs to their correct namesMichael Niewöhner
2020-09-17soc/intel/cannonlake: fix GPIO community numbering in ACPIMichael Niewöhner
2020-09-14soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.hSubrata Banik
2020-09-14soc/intel/cnl: Add ACPI support for PMC core OS driverMichael Niewöhner
2020-09-14soc/intel/common/cpu: Update COS mask calculation for NEM enhanced modeAamir Bohra
2020-09-09soc/intel/cannonlake: Add PCIe ports on PCH-HPatrick Rudolph
2020-09-06soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by defaultMichael Niewöhner
2020-09-04soc/intel/cnl: Enable HECI3 depending on devicetreeFelix Singer
2020-09-03soc/intel/cnl: Allow using the remaining Comet Lake FSPsFelix Singer
2020-09-033rdparty/fsp: Update submodule pointer to current masterFelix Singer
2020-09-03soc/intel/cnl: Add new Kconfig option which matches its FSPs nameFelix Singer
2020-08-23soc/intel/cnl: Configure FSP option PcieRpSlotImplementedNico Huber
2020-08-18elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPEAaron Durbin
2020-08-12soc/intel/cannonlake: Set FSP-M UPD Heci1BarAddressSridhar Siricilla
2020-08-10soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devicesPatrick Rudolph
2020-08-07soc/intel/cnl: Set Heci1Disable depending on devicetree configFelix Singer
2020-08-07soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik
2020-08-05{nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik
2020-07-31soc/intel/cannonlake: Fix DMAR when no iGPU is presentPatrick Rudolph
2020-07-28soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabledFelix Singer
2020-07-26src: Update bare access to BOOL CONFIG_ vals to CONFIG()Martin Roth
2020-07-26cpu,soc/intel: Drop select SMPKyösti Mälkki
2020-07-26src: Remove unused 'include <cbmem.h>'Elyes HAOUAS
2020-07-22soc/intel/cannonlake: Move tco_configure to bootblockTim Wawrzynczak
2020-07-21src: Use ACPI macrosElyes HAOUAS
2020-07-20soc/intel/cannonlake: Add configs for USB 3.1 Gen2 EV settingsJamie Chen
2020-07-14src: Remove unused 'include <stdint.h>Elyes HAOUAS
2020-07-06soc/intel: Drop unused `#include <reg_script.h>`Angel Pons
2020-07-01soc/intel/cannonlake: make satahotplug user configurable via devicetreeJonas Loeffelholz
2020-06-30soc/intel/cannonlake: Add UWES ASL into xhci.aslEdward O'Callaghan
2020-06-30ACPI: Drop typedef global_nvs_tKyösti Mälkki
2020-06-30src: Remove whitespaces before tabsElyes HAOUAS
2020-06-28soc/intel/common: add TCC activation functionalitySumeet R Pawnikar
2020-06-25soc/intel/cannonlake: Add PchPmPwrCycDur to chip optionsSridhar Siricilla
2020-06-25soc/intel/cannonlake: Add missing USB_PORT_WAKE_ENABLE defineEdward O'Callaghan
2020-06-18soc/intel/cannonlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel: remove unused dptf.asl file and other definesSumeet R Pawnikar
2020-06-17soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimitPatrick Rudolph
2020-06-17soc/intel/cannonlake: Use table instead of switch-casePatrick Rudolph
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-16soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-14soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel
2020-06-10soc/intel/cannonlake: Put braces around *else* branchPaul Menzel
2020-06-10ACPI: Remove Kconfig COMMON_FADTKyösti Mälkki
2020-06-02soc/intel/common/{pch,sata}: Remove SATA common code driverSubrata Banik
2020-06-02soc/intel/cannonlake: Add RP configuration settingsChristian Walter
2020-06-02soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-28soc/intel/common: Improve Type16 SMBIOS tablesPatrick Rudolph
2020-05-27soc/intel/gma: Implement fsp_soc_get_igd_bar() in common codeNico Huber
2020-05-27soc/intel/gma: Move DDI-A 4-lane config to common codeNico Huber
2020-05-27soc/intel/gma: Move display and opregion init to common codeNico Huber
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-26cannonlake: update processor power limits configurationSumeet R Pawnikar
2020-05-26soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip optionsChristian Walter
2020-05-26intel/cannonlake: Implement PCIe RP devicetree updateNico Huber
2020-05-18src: Remove unused 'include <string.h>'Elyes HAOUAS
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-14soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()Furquan Shaikh
2020-05-14soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4GFurquan Shaikh
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-04soc/intel/cannonlake: Add DisableHeciRetry to configChristian Walter
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-01soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/cannonlake/bootblock: Fix FSP CARPatrick Rudolph
2020-05-01src: Remove not used 'include <smbios.h>'Elyes HAOUAS
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS
2020-04-28soc/intel: Constify struct device *param to sd_fill_soc_gpio_infoFurquan Shaikh
2020-04-28device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh
2020-04-28soc/intel/cannonlake: Report driver strength by _DSM in eMMC ACPI deviceKane Chen
2020-04-28soc/intel/cometlake: Add ucode from repoFelix Singer
2020-04-18soc/intel/*/vr_config.c: Use __func__ in error messageAngel Pons
2020-04-17soc/intel: Disable config option for SCS by defaultDuncan Laurie
2020-04-13acpi: Bump FADT to revision 6Patrick Rudolph
2020-04-10Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber
2020-04-10Drop unnecessary DEVICE_NOOP entriesNico Huber
2020-04-09soc/intel/cannonlake: Steal no memory for disabled IGDChristian Walter
2020-04-09soc/intel: Remove unneeded whitespacesElyes HAOUAS
2020-04-06soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-05fsp2_0: Gather Kconfig declarationsNico Huber
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
2020-03-30intel/fsp2_0: Make FSP_USE_REPO a SoC opt-inJohanna Schander
2020-03-25soc/intel/cometlake: Use IntelFSP repoFelix Singer
2020-03-23soc/intel/cfl/vr_config: Add 8-core desktop CPU supportPatrick Rudolph
2020-03-18soc: Remove copyright noticesPatrick Georgi