| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-07-19 | soc/intel/common: Add SOC specific function to get XHCI USB info | Karthikeyan Ramasubramanian |
| 2019-07-02 | soc/intel/cannonlake: Add support to log XHCI wake events | Paul Fagerburg |
| 2019-03-15 | soc/intel/cannonlake: Fix GEN_PMCON bit checks | Furquan Shaikh |
| 2019-03-07 | soc/intel/cannonlake: Add support for logging wake source in SMM | V Sowmya |
| 2019-01-10 | soc/intel/cannonlake: complete rename of TCO2_STS_SECOND_TO | Patrick Georgi |
| 2019-01-08 | soc/intel/cannonlake: Add chipset event logging | Duncan Laurie |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |