coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-11-28	sb,soc/intel: Address TCO SECOND_TO_STS name collision	Kyösti Mälkki
2021-04-19	soc/intel/cannonlake/elog.c: Define __SIMPLE_DEVICE__	Angel Pons
2021-01-23	ELOG: Add const qualifier for chipset_power_state	Kyösti Mälkki
2020-12-10	soc/intel/common: Adapt XHCI elog driver for reuse	Tim Wawrzynczak
2020-08-18	elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE	Aaron Durbin
2020-07-26	src: Remove unused 'include <cbmem.h>'	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/cannonlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-07-25	soc/intel/cannonlake: Split the "internal PME" wake-up into more detail	Paul Fagerburg
2019-07-19	soc/intel/common: Add SOC specific function to get XHCI USB info	Karthikeyan Ramasubramanian
2019-07-02	soc/intel/cannonlake: Add support to log XHCI wake events	Paul Fagerburg
2019-03-15	soc/intel/cannonlake: Fix GEN_PMCON bit checks	Furquan Shaikh
2019-03-07	soc/intel/cannonlake: Add support for logging wake source in SMM	V Sowmya
2019-01-10	soc/intel/cannonlake: complete rename of TCO2_STS_SECOND_TO	Patrick Georgi
2019-01-08	soc/intel/cannonlake: Add chipset event logging	Duncan Laurie