coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-12-05	soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT	Furquan Shaikh
2017-11-04	soc/intel/cannonlake: Install common i2c	Lijian Zhao
2017-11-01	soc/intel/cannonlake: Use SCS common code	Bora Guvendik
2017-10-18	soc/intel/cannonlake: Set platform Debug Probe Type	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Update PCIE CLKREQ programing	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Add lpc pci driver	Lijian Zhao
2017-09-20	soc/intel/cannonlake: Add PMC pci drivers	Lijian Zhao
2017-09-13	soc/intel/cannonlake: Add serialio device config	Lijian Zhao
2017-09-13	soc/intel/cannonlake: Add common ACPI support for CNL	Lijian Zhao
2017-08-30	soc/intel/cannonlake: Add PrmrrSize and C6DRAM config	Subrata Banik
2017-08-25	soc/intel/cannonlake: Init UPD params based on config	Pratik Prajapati
2017-08-22	soc/intel/cannonlake: Define soc_intel_cannonlake_config	Pratik Prajapati
2017-08-21	soc/intel/cannonlake: Enable common PMC code for CNL	Lijian Zhao
2017-08-17	soc/intel/cannonlake: Add SPI flash controller driver	Lijian Zhao
2017-08-15	soc/intel/cannonlake: Call into FSP siliconinit	Lijian Zhao
2017-07-21	Revert "soc/intel/cannonlake: Call into FSP siliconinit"	Martin Roth
2017-07-21	soc/intel/cannonlake: Call into FSP siliconinit	Lijian Zhao