coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-06-20	soc/apollolake: Include PCI _OSC method	Hannah Williams
2016-06-15	intel/apollolake: Correct the offsets in gnvs	Furquan Shaikh
2016-06-15	intel/apollolake: Add CBMEM console to GNVS	Furquan Shaikh
2016-06-01	soc/apollolake: remove _RMV and _DSW methods from xhci.asl	Hannah Williams
2016-06-01	intel/apollolake: Add support to enable google ChromeEC	Shaunak Saha
2016-05-25	soc/apollolake: Enable Wake from USB devices	Hannah Williams
2016-04-28	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	Lance Zhao
2016-04-28	soc/intel/apollolake: Add GPIO devices	Zhao, Lijian
2016-04-28	soc/intel/apollolake: Fix northbridge _crs scope	Zhao, Lijian
2016-04-28	soc/intel/apollolake: Actually include ACPI PCI IRQ definitions	Andrey Petrov
2016-04-16	intel/apollolake: Fix whitespace issues	Martin Roth
2016-04-15	soc/intel/apollolake: Fix northbridge _CRS	Zhao, Lijian
2016-04-14	soc/apollolake: Add ACPI platform sleep capability	Hannah Williams
2016-04-14	soc/intel: Update license headers	Martin Roth
2016-04-11	soc/intel/apollolake: Fill _PRT entry in DSDT	Zhao, Lijian
2016-04-11	soc/intel/apollolake: Add lpss dsdt entry	Zhao, Lijian
2016-04-04	soc/intel/apollolake: Fill northbridge ASL	Zhao, Lijian