coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-12-03	src: Remove redundant use of ACPI offset(0)	Elyes HAOUAS
2020-05-14	soc/intel: Always advertise MMIO window above 4G in ACPI tables	Furquan Shaikh
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-01-10	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	Subrata Banik
2017-10-20	soc/intel/apollolake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-08-10	soc/intel/apollolake: Enable UART debug controller on S3 resume	Furquan Shaikh
2017-06-07	src: change coreboot to lowercase	Martin Roth
2017-04-13	soc/intel/apollolake: Set sdcard card detect (CD) host ownership	Venkateswarlu Vinjamuri
2017-03-10	soc/intel/apollolake: Add PM methods to power gate SD card	Venkateswarlu Vinjamuri
2016-09-14	soc/intel/apollolake: Add PM methods to power gate PCIe	Vaibhav Shankar
2016-06-28	soc/intel/apollolake: Add NHLT table region to ACPI global nvs	Saurabh Satija
2016-06-24	soc/intel/apollolake: Include _PTS, _WAK and _SWS	Hannah Williams
2016-06-15	intel/apollolake: Correct the offsets in gnvs	Furquan Shaikh
2016-06-15	intel/apollolake: Add CBMEM console to GNVS	Furquan Shaikh
2016-06-01	intel/apollolake: Add support to enable google ChromeEC	Shaunak Saha
2016-04-28	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	Lance Zhao