| Age | Commit message (Expand) | Author |
|---|
| 2022-10-13 | payloads,src: Replace ALIGN(x, a) by ALIGN_UP(x, a) for clarity | Elyes Haouas |
| 2022-10-13 | soc/amd/*/psp_verstage/svc: Make svc.h macros common | Fred Reitberger |
| 2022-10-13 | soc/amd/cezanne: enable LPC decodes if platform uses LPC | Jeremy Soller |
| 2022-10-12 | treewide: Use 'fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'gpe0_blk' for 'x_gpe0_blk.addrl' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'gpe0_blk_len' for 'x_gpe0_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->pm_tmr_len' for 'x_pm_tmr_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->pm1_cnt_len' for 'x_pm1a_cnt_blk.bit_width' | Elyes Haouas |
| 2022-10-12 | treewide: Use 'fadt->pm1_evt_len' for 'x_pm1a_evt_blk.bit_width' | Elyes Haouas |
| 2022-10-07 | soc/amd/{CZN,MDN,PCO}: Fix building with only single RW region | Matt DeVillier |
| 2022-09-30 | soc/amd/cezanne,mendocino,picasso/uart: use write16p to avoid typecasts | Felix Held |
| 2022-09-15 | amd/cezanne: Control DPTC with only Kconfig | Tim Van Patten |
| 2022-09-14 | acpi/soc: Conditionally include dptc.asl | Tim Van Patten |
| 2022-09-14 | soc/amd/cezanne/Kconfig: add defaults for FSP_M_FILE and FSP_S_FILE | Felix Held |
| 2022-09-14 | cpu/amd/smm: Move MP & SMM init in a common place | Arthur Heymans |
| 2022-09-14 | soc/amd: Recalculate the field power in PSS table entry | Zheng Bao |
| 2022-09-12 | soc/amd: Remove unsupported DPTC tablet mode settings | Tim Van Patten |
| 2022-09-12 | soc/amd: Refactor DPTC Tablet Mode | Tim Van Patten |
| 2022-09-07 | amd: Convert dptc_enable to bool | Tim Van Patten |
| 2022-09-01 | amd/*/Makefile.inc: Put common words into common Makefile.inc | Zheng Bao |
| 2022-08-25 | soc/amd: rework SPI flash MMIO region handling | Felix Held |
| 2022-08-17 | soc/amd/common/acpi/cppc: add nominal and minimum frequencies | Felix Held |
| 2022-08-17 | soc/amd/cezanne,picasso,sabrina/smihandler: add comment about SMN access | Felix Held |
| 2022-08-15 | soc/amd/*: move reset_i2c_peripherals call after early GPIO setup | Felix Held |
| 2022-08-12 | soc/amd/cezanne,common: factor out CPPC code to common AMD SoC code | Felix Held |
| 2022-08-04 | soc/amd/cezanne/cppc: drop duplicate newline | Felix Held |
| 2022-08-04 | soc/amd/cezanne/cppc: reduce visibility of cpu_init_cppc_config | Felix Held |
| 2022-07-17 | soc/amd: Fix some white spaces issues | Elyes Haouas |
| 2022-07-16 | soc/amd/[cezanne,picasso,sabrina]/Kconfig: Add PSP_APOB_DRAM_SIZE config option | Fred Reitberger |
| 2022-07-14 | lib/program_loaders.c: Mark run_ramstage with __noreturn | Arthur Heymans |
| 2022-07-14 | soc/amd/*: Move apm call out of MP init code | Arthur Heymans |
| 2022-07-04 | treewide: Unify Google branding | Jon Murphy |
| 2022-06-22 | device/resource: Add _kb postfix for resource allocators | Kyösti Mälkki |
| 2022-06-21 | soc/amd/*/Kconfig: drop unused SOC_AMD_COMMON_BLOCK_UCODE_SIZE option | Felix Held |
| 2022-06-21 | soc/amd/*: Move selection of DRIVERS_I2C_DESIGNWARE to common block | Matt DeVillier |
| 2022-06-20 | soc/amd/*: Make mtrr decision based on syscfg | Arthur Heymans |
| 2022-06-09 | soc/amd/sabrina/acpi: Correct VID decoding on Sabrina | Fred Reitberger |
| 2022-06-07 | arch/x86: Add a common romstage entry | Arthur Heymans |
| 2022-06-07 | soc/amd/common/block/cpu/: Make ucode update more generic | Fred Reitberger |
| 2022-05-16 | soc/amd/cezanne/fsp_m_params: fix modification of constant | Fred Reitberger |
| 2022-05-16 | soc/amd/cezanne/fsp_m_params: add defines for FSP USB struct version | Felix Held |
| 2022-05-16 | soc/amd/cezanne/fsp_m_params: don't hard-code USB PHY config table size | Felix Held |
| 2022-04-03 | soc/amd/cezanne/fw.cfg: provide default SPL table binary | Felix Held |
| 2022-04-01 | arch/x86/Kconfig: Drop obsolete fixed ramstage symbols | Arthur Heymans |
| 2022-03-25 | soc/amd/cezanne/cpu.c: Skip SMMINFO init in S3 resume | Fred Reitberger |
| 2022-03-23 | amdfwtool: Change the some FW's level for A/B recovery | Zheng Bao |
| 2022-03-23 | soc/amd/cezanne: Turn off gpp clock request for disabled devices | Robert Zieba |
| 2022-03-23 | soc/amd/cezanne: Add PSP Bootloader for AB recovery in fw.cfg | Zheng Bao |
| 2022-03-23 | soc/amd/common/psp_verstage: Write postcodes after ESPI init | Karthikeyan Ramasubramanian |
| 2022-03-17 | soc/amd/cezanne: Add counter initializers | Jon Murphy |
| 2022-03-10 | soc/amd/{common/vboot,cezanne}: Copy S0i3 verstage logs into cbmem | Raul E Rangel |
| 2022-03-10 | soc/amd/cezanne/psp_verstage: Log the platform boot mode report | Karthikeyan Ramasubramanian |
| 2022-03-09 | soc/amd/*/lpc: rename SPIROM_BASE_ADDRESS_REGISTER | Felix Held |
| 2022-03-08 | timestamps: Rename timestamps to make names more consistent | Jakub Czapiga |
| 2022-03-07 | src: Make PCI ID define names shorter | Felix Singer |
| 2022-03-03 | soc/amd/*/northbridge,root_complex: add comment about PCI BARs | Felix Held |
| 2022-03-03 | soc/amd/*/northbridge,root_complex: simplify GNB IOAPIC resource index | Felix Held |
| 2022-03-03 | soc/amd/*/northbridge,root_complex: simplify mmconf_resource index | Felix Held |
| 2022-03-02 | soc/amd/common/vboot: Remove parameter to replay_transfer_buffer_cbmemc | Raul E Rangel |
| 2022-03-02 | soc/amd/common/vboot: Split transfer buffer methods into separate file | Raul E Rangel |
| 2022-02-25 | arch/x86: consolidate HPET base address definitions | Felix Held |
| 2022-02-25 | arch/x86: factor out and commonize HPET_BASE_ADDRESS definition | Felix Held |
| 2022-02-24 | soc/amd/*/include/soc/iomap.h: rework HPET base address check | Felix Held |
| 2022-02-21 | soc/amd/*/fw.cfg: Remove the misleading name for PMUI and PMUD | Zheng Bao |
| 2022-02-18 | drivers/fsp/fsp2_0: Rework FSP Notify Phase API configs | Subrata Banik |
| 2022-02-17 | soc/amd/common/block/i2c: Add support for shared TPM_I2C controller | Jan Dabros |
| 2022-02-17 | src/soc: Remove space before tab | Elyes Haouas |
| 2022-02-16 | soc/amd/cezanne/psp_verstage/uart: Fix off by 1 error | Raul E Rangel |
| 2022-02-12 | soc/amd/cezanne/psp_verstage/uart: Fix off by 1 error | Raul E Rangel |
| 2022-02-12 | soc/amd/cezanne: Allow to specify SPL table path in Kconfig | Zheng Bao |
| 2022-02-11 | soc/amd/common/acp: introduce acp_gen1 | Fred Reitberger |
| 2022-02-11 | soc/amd/cezanne,picasso,sabrina: Fix incorrect values of CBFS amdfw position ... | Robert Zieba |
| 2022-02-08 | soc/amd/cezanne: Disable CONSOLE_CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS | Raul E Rangel |
| 2022-02-08 | soc/amd/cezanne/psp_verstage: Implement get_uart_base | Raul E Rangel |
| 2022-02-07 | treewide: Remove "ERROR: "/"WARN: " prefixes from log messages | Julius Werner |
| 2022-02-07 | soc/amd/cezanne: Add the fw SPL to fw.cfg | Zheng Bao |
| 2022-02-05 | cpu/x86/lapic: Move LAPIC configuration to MP init | Kyösti Mälkki |
| 2022-02-03 | soc/amd/*/i2c: factor out common I2C pad configuration | Felix Held |
| 2022-02-03 | soc/amd/*/i2c: introduce and use MISC_I2C_PAD_CTRL(bus) macro | Felix Held |
| 2022-02-03 | soc/amd/*/i2c: drop unused mainboard_i2c_override | Felix Held |
| 2022-02-02 | soc/amd/cezanne: Rename PSP_POSTCODES_ON_ESPI to PSP_INIT_ESPI | Raul E Rangel |
| 2022-02-02 | soc/amd/cezanne,vc/cezanne: Implement svc_write_postcode | Raul E Rangel |
| 2022-02-01 | psp_verstage: report developer mode to PSP | Kangheui Won |
| 2022-02-01 | psp_verstage: add new svc for cezanne | Kangheui Won |
| 2022-01-26 | src: Add missing 'void' in function definition | Elyes HAOUAS |
| 2022-01-26 | soc/amd/cezanne,picasso,sabrina: factor out get_threads_per_core | Felix Held |
| 2022-01-25 | soc/amd/cezanne: FSP: Add UPD entry for eDP tuning | Zheng Bao |
| 2022-01-25 | soc/amd/cezanne: Increase PRERAM_CBMEM_CONSOLE_SIZE to 0x2000 | Raul E Rangel |
| 2022-01-23 | soc/amd/{common,cezanne,picasso}: Add PRE_X86_CBMEM_CONSOLE_SIZE | Raul E Rangel |
| 2022-01-20 | soc/amd/cezanne,picasso: factor out common early non-car cache setup | Felix Held |
| 2022-01-20 | soc/amd/cezanne/include/espi.h: add missing include guards | Felix Held |
| 2022-01-18 | soc/amd/{picasso,cezanne}: Enable CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS | Raul E Rangel |
| 2022-01-14 | soc/amd/cezanne: factor out eSPI SPI2 pads configuration functions | Felix Held |
| 2022-01-13 | soc/amd/*/chip.h: add missing gpio.h include | Felix Held |
| 2022-01-11 | soc/amd/cezanne/include/i2c: add missing types.h include | Felix Held |
| 2022-01-11 | soc/amd/cezanne/include/i2c: move include inside header guard | Felix Held |
| 2022-01-10 | src/soc/amd: Remove unused <console/console.h> | Elyes HAOUAS |
| 2021-12-20 | soc/amd/cezanne: Correct S0i3 verstage softfuse bit | Rob Barnes |
| 2021-12-20 | soc/amd/cezanne/fch: disable 48MHz output in S0i3 | Felix Held |
