coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-10-13	soc/amd/cezanne: Use devicetree ops over pci driver	Arthur Heymans
2022-09-15	amd/cezanne: Control DPTC with only Kconfig	Tim Van Patten
2022-09-12	soc/amd: Remove unsupported DPTC tablet mode settings	Tim Van Patten
2022-09-12	soc/amd: Refactor DPTC Tablet Mode	Tim Van Patten
2022-06-22	device/resource: Add _kb postfix for resource allocators	Kyösti Mälkki
2022-03-07	src: Make PCI ID define names shorter	Felix Singer
2022-03-03	soc/amd/*/northbridge,root_complex: add comment about PCI BARs	Felix Held
2022-03-03	soc/amd/*/northbridge,root_complex: simplify GNB IOAPIC resource index	Felix Held
2022-03-03	soc/amd/*/northbridge,root_complex: simplify mmconf_resource index	Felix Held
2022-02-07	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	Julius Werner
2021-05-13	soc/amd: factor out acpigen_write_alib_dptc to common code	Felix Held
2021-05-13	soc/amd/cezanne/root_complex: generate DPTC ACPI method	Felix Held
2021-05-09	soc/amd/cezanne: add GNB IOAPIC support	Felix Held
2021-02-22	soc/amd/cezanne/acpi: Add pci0.asl	Raul E Rangel
2021-02-18	soc/amd/cezanne/root_complex: provide ACPI name in PCI device_operations	Felix Held
2021-02-09	soc/amd/cezanne: Add root_complex	Raul E Rangel