diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-03-02 23:02:31 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-03 22:45:28 +0000 |
| commit | b1197af7f5aa18b17160f0c5fba9869482891cd2 (patch) | |
| tree | 21db49d4df0d514bf3ea77e298689b397841330e /src/soc/amd/cezanne/root_complex.c | |
| parent | 56b037b857e17691dfb528f969772a8acb28b2c4 (diff) | |
soc/amd/*/northbridge,root_complex: simplify GNB IOAPIC resource index
In the northbridge's and root complex' read_resources function, the
GNB IOAPIC resource used MMIO base address of the GNB IOAPIC as index
which might be misleading. Instead use idx++ as a unique index for this
resource.
TEST=Resource allocator doesn't complain and no related warnings or
errors in dmesg. The update_constraints console output changes like
expected:
Before: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)
After: PCI: 00:00.0 0d base fec01000 limit fec01fff mem (fixed)
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8061364879d772469882fc060f92676de6f600a9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne/root_complex.c')
| -rw-r--r-- | src/soc/amd/cezanne/root_complex.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c index e29b4e03e4..dabfa789aa 100644 --- a/src/soc/amd/cezanne/root_complex.c +++ b/src/soc/amd/cezanne/root_complex.c @@ -168,7 +168,7 @@ static void read_resources(struct device *dev) } /* GNB IOAPIC resource */ - gnb_apic = new_resource(dev, GNB_IO_APIC_ADDR); + gnb_apic = new_resource(dev, idx++); gnb_apic->base = GNB_IO_APIC_ADDR; gnb_apic->size = 0x00001000; gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |