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path: root/src/security/intel/txt
AgeCommit message (Expand)Author
2022-04-24{drivers,northbridge,security}: Remove unused <cpu/x86/lapic.h>Elyes HAOUAS
2022-01-12src: Remove redundant <rules.h> and <commonlib/bsd/compiler.h>Elyes HAOUAS
2022-01-01src: Drop duplicated includesElyes HAOUAS
2021-12-06x86_64 assembly: Don't touch %gsPatrick Rudolph
2021-12-06security/intel: Use defines for segment registersPatrick Rudolph
2021-12-02security/intel/txt: Fix HEAP_ACM format depending on number of ACMs in CBFSMichał Żygowski
2021-11-27security/intel/txt: Fix GETSEC checks in romstageMichał Żygowski
2021-11-27security/intel/txt: Allow platforms without FIT to use Intel TXTMichał Żygowski
2021-11-27security/intel/txt: Issue a global reset when TXT_RESET bit is setMichał Żygowski
2021-11-27security/intel/txt: Use set_global_reset in txt_reset_platform if possibleMichał Żygowski
2021-11-27security/intel/txt: Implement GETSEC PARAMETER dumpingMichał Żygowski
2021-11-27security/intel/txt: Remove unused region deviceMichał Żygowski
2021-11-27security/intel/txt: Correct reporting of chipset production fuse stateMichał Żygowski
2021-11-26security/intel/txt: Allow to set TXT BIOS Data Region versionMichał Żygowski
2021-11-01security/intel/txt: Get addr bits at runtimeArthur Heymans
2021-10-05src/mainboard to src/security: Fix spelling errorsMartin Roth
2021-09-17security/intel/txt/romstage: add missing arch/cpu.h includeFelix Held
2021-07-14include/cpu/x86/msr: introduce IA32_MC_*(x) macrosFelix Held
2021-07-12security/intel/txt: use mca_get_bank_count()Felix Held
2021-07-12security/intel/txt: add missing cpu/x86/msr.h includeFelix Held
2021-06-21security/intel/cbnt: Add loggingArthur Heymans
2021-06-21security/intel/txt: Split off microcode error types string printingArthur Heymans
2021-06-21security/intel/txt: Always build logging.cArthur Heymans
2021-05-30Apply more uses for Kconfig TPMKyösti Mälkki
2021-05-20security/intel/txt: Add weak function to skip TXT lockdownArthur Heymans
2021-05-11security/intel/txt: Set up TPM in bootblock if using measured bootArthur Heymans
2021-03-19cpu/intel/fit: Add the FIT table as a separate CBFS fileArthur Heymans
2021-03-17cbfs: Replace more instances of cbfs_boot_locate() with newer APIsJulius Werner
2021-02-16src/{drivers,security}: Remove unused <string.h>Elyes HAOUAS
2021-02-11security/intel/txt/Makefile.inc: Use tab for indentElyes HAOUAS
2021-01-15build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
2021-01-07security/intel/txt: Don't run SCHECK on CBnTArthur Heymans
2021-01-04security/intel/txt/ramstage.c: Fix clearing secrets on CBNTArthur Heymans
2020-12-29sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurableArthur Heymans
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-11-10sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans
2020-11-04haswell: Add Intel TXT support in romstageAngel Pons
2020-11-04sec/intel/txt: Add support for running SCLEAN in romstageAngel Pons
2020-10-28sec/intel/txt/Kconfig: Remove the menu for including ACMsArthur Heymans
2020-10-28sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variablesArthur Heymans
2020-10-22sec/intel/txt: Split MTRR setup ASM code into a macroAngel Pons
2020-10-22sec/intel/txt: Add `enable_getsec_or_reset` functionAngel Pons
2020-10-22sec/intel/txt: Extract BIOS ACM loading into a functionAngel Pons
2020-10-22sec/intel/txt: Only run LockConfig for LT-SXAngel Pons
2020-10-22sec/intel/txt: Always run SCHECK on regular bootsAngel Pons
2020-10-22sec/intel/txt: Allow skipping ACM NOP functionAngel Pons
2020-10-22sec/intel/txt/ramstage.c: Do not init the heap on S3 resumeAngel Pons
2020-10-22sec/intel/txt/ramstage.c: Extract heap init into a functionAngel Pons
2020-10-22sec/intel/txt: Add and fill in BIOS Specification infoAngel Pons
2020-10-22sec/intel/txt/common.c: Only log ACM error on failureAngel Pons
2020-10-22sec/intel/txt: Move DPR size to KconfigAngel Pons
2020-10-17intel/txt: Add `txt_get_chipset_dpr` functionAngel Pons
2020-10-17security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]Angel Pons
2020-10-17sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACMAngel Pons
2020-10-15sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPEArthur Heymans
2020-10-15security/intel/txt: Use `smm_region()` to get TSEG baseAngel Pons
2020-10-12security/intel/txt: Add and use DPR register layoutAngel Pons
2020-10-12security/intel/txt: Clean up includesAngel Pons
2020-10-08security/intel/txt: Print chipset as hex valueChristian Walter
2020-09-21src/security: Drop unneeded empty linesElyes HAOUAS
2020-08-30security/intel/txt/getsec.c: Do not check lock bitAngel Pons
2020-08-30security/intel/txt: Add missing definitionsAngel Pons
2020-08-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-08-07security/intel/txt: Fix variable MTRR handlingAngel Pons
2020-08-07security/intel/txt: Allow using CF9 reset, tooAngel Pons
2020-08-06security/intel/txt: Avoid shifting by a negative valueJohn Zhao
2020-07-31security/intel/txt: Add Intel TXT supportPhilipp Deppenwiese
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-08{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2019-11-21soc/intel/fsp_broadwell_de: Drop supportArthur Heymans
2019-11-14security/intel: Hide Intel submenu when INTEL TXT is disabledWim Vervoorn
2019-10-18build: Mark bootblock files on x86 as IBBPatrick Rudolph
2019-09-02security/intel: Add TXT infrastructurePatrick Rudolph