diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-05-12 16:22:05 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-21 05:42:00 +0000 |
| commit | ee55d71c96d44dc966abfa155e2178569ddb6b02 (patch) | |
| tree | 16ceef1b29044bac07cc499fa7acd136b8003a85 /src/security/intel/txt | |
| parent | 773ecfe11d27c9e2d6506400368be39db1e19bf5 (diff) | |
security/intel/cbnt: Add logging
This decodes and logs the CBnT status and error registers.
Change-Id: I8b57132bedbd944b9861ab0e2e0d14723cb61635
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54093
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/security/intel/txt')
| -rw-r--r-- | src/security/intel/txt/ramstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/security/intel/txt/ramstage.c b/src/security/intel/txt/ramstage.c index 85fa931474..3ca766e51c 100644 --- a/src/security/intel/txt/ramstage.c +++ b/src/security/intel/txt/ramstage.c @@ -10,6 +10,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/smm.h> #include <device/pci_ops.h> +#include <security/intel/cbnt/cbnt.h> #include <types.h> #include "txt.h" @@ -130,6 +131,9 @@ static void init_intel_txt(void *unused) intel_txt_log_spad(); + if (CONFIG(INTEL_CBNT_LOGGING)) + intel_cbnt_log_registers(); + if (CONFIG(INTEL_TXT_LOGGING)) { intel_txt_log_bios_acm_error(); txt_dump_chipset_info(); |