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path: root/src/northbridge/intel/x4x/memmap.c
AgeCommit message (Expand)Author
2021-01-30nb/intel/x4x: Define and use MMCONF_BUS_NUMBERAngel Pons
2020-09-21src/northbridge: Drop unneeded empty linesElyes HAOUAS
2020-08-04nb/intel/x4x: Define and use `HOST_BRIDGE` macroAngel Pons
2020-08-04nb/intel/x4x: Refactor `decode_pcie_bar`Angel Pons
2020-08-04nb/intel/x4x: Change signature of `decode_pciebar`Angel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-02-24src: capitalize 'RAM'Elyes HAOUAS
2019-11-01lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans
2019-08-28intel/smm/gen1: Use smm_subregion()Kyösti Mälkki
2019-08-26soc/intel: Use common romstage codeKyösti Mälkki
2019-08-22arch/x86: Add <arch/romstage.h>Kyösti Mälkki
2019-08-15intel/smm/gen1: Rename header fileKyösti Mälkki
2019-08-15arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki
2019-08-15cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki
2019-08-07northbridge/intel: Rename ram_calc.c to memmap.cKyösti Mälkki
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