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path: root/src/northbridge/intel/sch
AgeCommit message (Expand)Author
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-29kbuild: automatically include northbridgesStefan Reinauer
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2015-01-27CBMEM: Tag chipsets with LATE_CBMEM_INITKyösti Mälkki
2015-01-27intel: Drop romstage handoff via scratchpadKyösti Mälkki
2015-01-06northbridge/intel: Do not define include guard as 1Edward O'Callaghan
2014-11-01northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan
2014-10-18sch: Switch to per-device ACPIVladimir Serbinenko
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-07-24northbridge/intelsch/raminit.h: Remove a trailing whitespaceElyes HAOUAS
2014-07-17northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-05-19intel: Remove GFXUMA and related global variablesKyösti Mälkki
2013-09-11CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki
2013-08-01Add directive __SIMPLE_DEVICE__Kyösti Mälkki
2013-07-10Drop some duplicates of PCI-e config functionsKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-07-03Move select MMCONF_SUPPORT under northbridgeKyösti Mälkki
2013-06-25intel/sch: Use MMCONF_BASE_ADDRESSKyösti Mälkki
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-11-27Get rid of drivers classPatrick Georgi
2012-10-26northbridge/sch: move the \n so it reads a little betterSebastian Andrzej Siewior
2012-10-26northbridge/sch: read the size of main memory from the proper registerSebastian Andrzej Siewior
2012-10-26northbridge/sch: Read the GPU memory from the correct PCI deviceSebastian Andrzej Siewior
2012-10-26northbridge/sch: don't overwrite hightables with GPU / TSEG memorySebastian Andrzej Siewior
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-25HAVE_HIGH_TABLES is gonePatrick Georgi
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-07-27Intel and GFXUMA: fix MTRR and use uma_resource()Kyösti Mälkki
2012-07-27Intel i945 and sch: no memory over 4GBKyösti Mälkki
2012-07-20Intel SCH northbridge: fix resource indexKyösti Mälkki
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-05-08Clean up #ifsPatrick Georgi
2012-04-12Unify IO APIC address specificationPatrick Georgi
2012-02-17Avoid ../../.. paths in ASL filesPatrick Georgi
2011-10-15use acpi.h include instead of manually adding acpi_slp_type.Stefan Reinauer
2011-10-14fix compilation of intel/sch northbridge code with gcc 4.6Stefan Reinauer
2010-12-19The same mechanisms are used for normal and fallback images. Stefan Reinauer
2010-12-18Fix a few whitespace and coding style issues.Uwe Hermann
2010-12-18A couple of Poulsbo fixes:Patrick Georgi
2010-12-18Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 boardPatrick Georgi
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