summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2019-04-06src: Use include <delay.h> when appropriateElyes HAOUAS
2019-03-27Move calls to quick_ram_check() before CBMEM initKyösti Mälkki
2019-03-25Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX)Julius Werner
2019-03-21{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik
2019-03-21{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik
2019-03-20src: Use 'include <string.h>' when appropriateElyes HAOUAS
2019-03-19Fix 'unsigned int' to bare use of 'unsigned'Subrata Banik
2019-03-16src: Drop unused '#include <halt.h>'Elyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-06src: Drop unused include <arch/acpi.h>Elyes HAOUAS
2019-03-06nb/intel/sandybridge: Reserve CAR region with !NATIVE_RAMINITKyösti Mälkki
2019-03-06Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-02-10nb/intel/sandybridge: Use pcidev_on_root()Kyösti Mälkki
2019-01-25nb/intel/sandybridge/acpi: Add RMRR entry for iGPUNico Huber
2019-01-23Drop leftover debug function declarationsKyösti Mälkki
2019-01-22cpu/intel/model_206ax: Use parallel MP initArthur Heymans
2019-01-16nb/intel/sandybridge: Remove the C native graphic initArthur Heymans
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
2019-01-13{mb,nb,soc/fsp_baytrail}: Get rid of dump_mem()Elyes HAOUAS
2019-01-09cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans
2019-01-06usbdebug: Make the EHCI debug console work in the bootblockArthur Heymans
2019-01-06usbdebug: Refactor init callsKyösti Mälkki
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2019-01-06device: Use pcidev_on_root()Kyösti Mälkki
2018-12-19northbridge: Remove useless include <device/pci_ids.h>Elyes HAOUAS
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-11-16src: Remove unneeded include <lib.h>Elyes HAOUAS
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-09-14nb/intel/sandybridge: Don't add SMBIOS Table 17 entries on resumeNico Huber
2018-08-22nb/intel/*/gma.c: Skip NGI when VGA decode is not enabledArthur Heymans
2018-08-21nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph
2018-08-20nb/intel/raminit: Remove unused headersPatrick Rudolph
2018-08-20nb/intel/sandybridge/raminit: Fix DIMM type mappingPatrick Rudolph
2018-08-20nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph
2018-08-17sandybridge/raminit_common.c: fix printram statementIru Cai
2018-08-03sandybridge/raminit_mrc: remove reference to report_platform_info()Matt DeVillier
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining placesFelix Held
2018-08-01sandybridge/raminit_common: use macro for execute command queue registerFelix Held
2018-08-01sandybridge/raminit_common: use FOR_ALL_CHANNELS macroFelix Held
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2]Felix Held
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2]Felix Held
2018-08-01northbridge/sandybridge: add MCHBAR32 AND/OR/AND_OR access macrosFelix Held
2018-08-01nb/intel/sandybridge: Don't use PCI operations on the pci_domain deviceArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-29sandybridge/raminit_common: use MCHBAR32 macro everywhereFelix Held
2018-07-29sandybridge/raminit: use MCHBAR32 macro everywhereFelix Held
2018-07-29sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macrosFelix Held
2018-07-29nb/intel/sandybridge: Bump MRC_CACHE_VERSIONPatrick Rudolph
2018-07-28nb/intel/sandybridge/report_platform: Move remaining code to sb folderPatrick Rudolph
2018-07-28nb/intel/sandybridge: Move CPU report to cpu folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-07-26nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus widthPatrick Rudolph
2018-07-26nb/intel/sandybridge/raminit: Fix PDWN_mode on desktopsPatrick Rudolph
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-07-25nb/intel/sandybridge/raminit: Fix non ASCII charPatrick Rudolph
2018-07-25nb/intel/sandybridge/raminit: Set REFIx9 according to specPatrick Rudolph
2018-07-02src/nb: Fix non-local header treated as localElyes HAOUAS
2018-06-30arch/x86/acpi: Add DMAR RMRR helper functionsMatt DeVillier
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-06-04src: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-04nb/intel: Use postcar_frame_add_romcache()Nico Huber
2018-06-04northbridge/intel: Remove unneeded includesElyes HAOUAS
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2018-05-29src/northbridge: Add and update license headersMartin Roth
2018-05-24nb/intel/sandybridge: Get rid of device_tElyes HAOUAS
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2018-04-30nb/intel/sandybridge: Get rid of device_tElyes HAOUAS
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-04-16nb/intel/sandybridge: support more XMP timingsDan Elkouby
2018-04-13nb/intel/sandybridge/peg: Add PEG driver stubPatrick Rudolph
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2018-04-10cpu/intel/sandybridge: Put stage cache into TSEGArthur Heymans
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2018-02-06nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESSArthur Heymans
2018-02-02nb/intel/sandybridge: Add required space before opening parenthesis '('Elyes HAOUAS
2018-01-31nb/intel/*.h: Remove left-over register definitionsPatrick Rudolph
2018-01-26nb/intel/sandybridge: Use common mrc cache functionsArthur Heymans
2018-01-23sb/intel/bd82x6x: Reduce function-disable messNico Huber
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
2017-12-20intel/gma: fix RPNFREQ_VAL bitmaskFelix Held
2017-10-283rdparty/lib{hwbase,gfxinit}: Update to latest masterNico Huber
2017-10-28drivers/intel/gma: Put gma_gfxinit() into its own headerNico Huber
2017-10-22security/vboot: Move vboot2 to security kconfig sectionPhilipp Deppenwiese
2017-10-19nb/sandybridge: Add a kconfig option to ignore XMP max DIMMsVagiz Trakhanov
2017-10-16sandybridge/acpi: remove unnessary check of PCI IDsVagiz Trakhanov
2017-10-16nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDsVagiz Trakhanov
2017-10-12nb/intel/sandybridge/raminit: Fix setting scramble seed for CH1Arthur Heymans