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path: root/src/northbridge/intel/sandybridge/raminit.c
AgeCommit message (Expand)Author
2020-12-25nb/intel/sandybridge: Rewrite constant valuesAngel Pons
2020-12-25nb/intel/sandybridge: Allow to ignore XMP voltageAngel Pons
2020-12-23nb/intel/sandybridge: Refactor ODT stretch table codeAngel Pons
2020-12-23nb/intel/sandybridge: Refactor `dram_find_spds_ddr3`Angel Pons
2020-09-21nb/intel/sandybridge: Check ME status only onceAngel Pons
2020-09-21nb/intel/sandybridge: Simplify SPD validity checkAngel Pons
2020-08-24mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen
2020-08-11nb/intel/sandybridge/raminit: Add ECC debug codePatrick Rudolph
2020-07-30nb/intel/*: Fill in SMBIOS type 16 on SNB/HSWPatrick Rudolph
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-02src: Remove unused 'include <bootmode.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-19nb/intel/sandybridge: Refactor get_mem_min_tckAngel Pons
2020-04-14nb/intel/sandybridge/raminit: Add ECC supportPatrick Rudolph
2020-04-14nb/intel/sandybridge/raminit: Add ECC detection supportPatrick Rudolph
2020-03-26nb/intel/sandybridge: Unify the code pathsAngel Pons
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-23nb/intel/sandybridge: Void MRC cache if CPUID differsAngel Pons
2020-03-23nb/intel/sandybridge: Store CPUID in ctrl structAngel Pons
2020-03-23nb/intel/sandybridge: Add warning to saved structsAngel Pons
2020-03-20nb/intel/sandybridge: Deduplicate report_memory_configAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2019-05-29src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS
2019-05-16nb/intel/sandybridge: Move DMI init codePatrick Rudolph
2019-05-15src/northbridge: Remove unneeded include <arch/io.h>Elyes HAOUAS
2019-05-06src: Remove unused include <halt.h>Elyes HAOUAS
2019-04-29nb/intel/sandybridge: Use system_reset()Elyes HAOUAS
2019-04-23nb/intel/sandybridge: Drop pch.h from sandybridge.hPatrick Rudolph
2019-04-06src: Use include <delay.h> when appropriateElyes HAOUAS
2019-03-27Move calls to quick_ram_check() before CBMEM initKyösti Mälkki
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-09-14nb/intel/sandybridge: Don't add SMBIOS Table 17 entries on resumeNico Huber
2018-08-21nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph
2018-08-20nb/intel/sandybridge/raminit: Fix DIMM type mappingPatrick Rudolph
2018-08-20nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph
2018-07-29sandybridge/raminit: use MCHBAR32 macro everywhereFelix Held
2018-07-29nb/intel/sandybridge: Bump MRC_CACHE_VERSIONPatrick Rudolph
2018-07-28nb/intel/sandybridge/report_platform: Move remaining code to sb folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-07-26nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus widthPatrick Rudolph
2018-01-26nb/intel/sandybridge: Use common mrc cache functionsArthur Heymans
2017-10-19nb/sandybridge: Add a kconfig option to ignore XMP max DIMMsVagiz Trakhanov
2017-09-27nb/intel/sandybridge/raminit: Improve readabilityPatrick Rudolph
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2017-06-08nb/intel/sandybridge/raminit: Advertise correct frequencyPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Always run quick_ram_checkPatrick Rudolph
2016-12-16nb/intel/sandybridge/raminit: Separate Sandybridge and IvybridgePatrick Rudolph
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-12-05nb/intel/sandybridge/raminit: Split raminit.cPatrick Rudolph
2016-11-29nb/intel/sandybridge/raminit: Support CL > 11Patrick Rudolph
2016-11-28nb/intel/sandybridge/raminit: Reset internal state on fallback attemptsPatrick Rudolph
2016-11-22nb/intel/sandybridge/raminit: Do not log inside busy-wait loopKyösti Mälkki
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-11-20intel sandy/ivy: Improve DIMM replacement detectionKyösti Mälkki
2016-11-20intel sandy/ivy: Skip SPD loading on S3 resume pathKyösti Mälkki
2016-11-20intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAMKyösti Mälkki
2016-11-20intel sandy/ivy: Change CRC used to detect DIMM replacementKyösti Mälkki
2016-11-20nb/intel/sandybridge/raminit: Fix disable_channelPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Find CMD rate per channelPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Define registersPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Get rid of fallback attemptsPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Fix CAS Write LatencyPatrick Rudolph
2016-10-04src/northbridge: Remove unnecessary whitespaceElyes HAOUAS
2016-10-04src/northbridge: Remove whitespace after sizeofElyes HAOUAS
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2016-07-31src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-07intel/sandybridge: read correct leaf for cpu familyRyan Salsamendi
2016-06-20nb/intel/sandybridge/raminit: Use supported CASPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devicesPatrick Rudolph
2016-06-12nb/intel/raminit (native): Read PCI mmio size from devicetreePatrick Rudolph
2016-06-12nb/intel: Factor out common MRC codePatrick Rudolph
2016-05-04nb/intel/sandybridge/raminit: support calling dram_freq multiple timesPatrick Rudolph
2016-05-04nb/intel/sandybridge/raminit: add additional fallbacksPatrick Rudolph
2016-04-29nb/intel/sandybridge/raminit: fix regression "always use mrccache"Patrick Rudolph
2016-04-10nb/intel/sandybridge/raminit: always use mrccachePatrick Rudolph
2016-04-05nb/intel/sandybridge/raminit: die in toplevel functionPatrick Rudolph
2016-04-05nb/intel/sandybridge/raminit: prepare raminit for fallbackPatrick Rudolph
2016-03-30nb/intel/sandybridge/raminit: move ram training into seperate functionPatrick Rudolph
2016-03-29nb/intel/sandybridge/raminit: move dimm_info into ramctr_timingPatrick Rudolph
2016-03-11northbridge/intel: move mrc_cache definition into a common headerAlexander Couzens
2016-03-03nb/intel/sandybridge/raminit: Fill SMBIOS type17 infoPatrick Rudolph
2016-03-02nb/intel/sandybridge/romstage: Read fuse bits for max MEM ClkPatrick Rudolph
2016-03-02nb/intel/sandybridge/raminit: Make discover_timC_write non cyclicPatrick Rudolph
2016-02-26nb/intel/sandybridge/raminit: Adjust timB to prevent overflowPatrick Rudolph
2016-02-20nb/intel/sandybridge/raminit: Add XMP supportPatrick Rudolph
2016-02-19nb/intel/sandybridge/raminit: Improve loggingPatrick Rudolph
2016-02-16nb/intel/sandybridge/raminit: Add shift offsetPatrick Rudolph
2016-02-12Merge sandy/ivybridge romstage flow for MRC and non-MRC.Vladimir Serbinenko
2016-02-04nb/intel/sandybridge/raminit: Fix two dimms per channelPatrick Rudolph
2016-01-29Revert "northbridge/intel/sandybridge: Fix random raminit failures"Vladimir Serbinenko
2016-01-17intel/sandybridge/raminit: fix ODT settingPatrick Rudolph