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path: root/src/northbridge/intel/sandybridge/early_init.c
AgeCommit message (Expand)Author
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki
2020-01-02src: Remove unneeded 'include <arch/io.h>'Elyes HAOUAS
2019-12-19src/northbridge: Remove unused <stdlib.h>Elyes HAOUAS
2019-06-08nb/intel/sandybridge: Drop iommu.c and rename functionsPatrick Rudolph
2019-05-29src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS
2019-05-13nb/intel/sandybridge: Move boot_count_increment()Patrick Rudolph
2019-04-18nb/intel/sandybridge: Move southbridge code to bd82x6xPatrick Rudolph
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-06src: Drop unused include <arch/acpi.h>Elyes HAOUAS
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2017-10-16nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDsVagiz Trakhanov
2017-06-27nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-05-05nb/intel/sandybridge/early_init: Use register namePatrick Rudolph
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-18intel/sandybridge: Use romstage_handoff for S3Kyösti Mälkki
2016-11-18intel/sandybridge post-car: Redo MTRR settings and stack selectionKyösti Mälkki
2016-11-11intel/sandybridge: Use common ACPI S3 recoveryKyösti Mälkki
2016-06-17Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki
2016-02-18nb/intel/sandybridge: Start PEG link trainingPatrick Rudolph
2015-11-04nb/intel/sandybridge: Enable basic IOMMU supportNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-09northbridge/intel/sandybridge: Do not disable PEG by defaultPatrick Rudolph
2015-07-13intel sandybridge: add VGA pci device idPatrick Rudolph
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-10-23intel/sandybridge: Add VGA pci device ID 0x0162Damien Zammit
2014-10-16sandybridge: Move common northbridge finalize to northbridge code.Vladimir Serbinenko
2014-08-03sandy/ivybridge: Make UMA size configurable.Vladimir Serbinenko
2013-07-10Drop some duplicates of PCI-e config functionsKyösti Mälkki
2013-07-04intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-01-14Support for Celeron 1007UStefan Reinauer
2012-07-25ELOG: Add support for a monotonic boot counter in CMOSDuncan Laurie
2012-07-24ELOG: Fix boot count increment for non-wake caseDuncan Laurie
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
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