diff options
author | Patrick Rudolph <siro@das-labor.org> | 2017-11-20 11:57:01 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2018-07-28 16:00:42 +0000 |
commit | 74203de85185842f90ff1708b4f16445cc279688 (patch) | |
tree | 4ced98a0ea62d32dd8fb22686085b219f07e0bf4 /src/northbridge/intel/sandybridge/early_init.c | |
parent | 2a7be5bf3061fe8ccd5505f08489ea4671b61f20 (diff) |
intel/sandybridge: Don't hardcode platform type
* Add a function to return CPU platform ID bits
* Add a function to return platform type
** Platform id is 4 on Lenovo T430 (mobile)
** Platform id is 1 on HP8200 (desktop)
* Use introduced method to handle platform specific code
* Use enum for platform type
* Report platform ID
Change-Id: Ifbfc64c8cec98782d6efc987a4d4d5aeab1402ba
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge/early_init.c')
-rw-r--r-- | src/northbridge/intel/sandybridge/early_init.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index 2f1b790bcb..7b4b3bed27 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -186,7 +186,7 @@ static void start_peg_link_training(void) } } -void sandybridge_early_initialization(int chipset_type) +void sandybridge_early_initialization(void) { u32 capid0_a; u32 deven; @@ -195,10 +195,12 @@ void sandybridge_early_initialization(int chipset_type) /* Device ID Override Enable should be done very early */ capid0_a = pci_read_config32(PCI_DEV(0, 0, 0), 0xe4); if (capid0_a & (1 << 10)) { + const size_t is_mobile = get_platform_type() == PLATFORM_MOBILE; + reg8 = pci_read_config8(PCI_DEV(0, 0, 0), 0xf3); reg8 &= ~7; /* Clear 2:0 */ - if (chipset_type == SANDYBRIDGE_MOBILE) + if (is_mobile) reg8 |= 1; /* Set bit 0 */ pci_write_config8(PCI_DEV(0, 0, 0), 0xf3, reg8); |