| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-08-09 | src/northbridge: Fix typo | Elyes HAOUAS |
| 2018-06-05 | nb/intel/pineview: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-04 | nb/intel: Use postcar_frame_add_romcache() | Nico Huber |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2017-04-24 | nb/intel/pineview: Move to early cbmem | Arthur Heymans |
| 2016-01-18 | nb/intel/pineview: Fix decode_pciebar() | Damien Zammit |
| 2015-12-02 | northbridge/intel/pineview: Add remaining boilerplate code for northbridge | Damien Zammit |
| 2015-11-24 | northbridge/intel/pineview: Add minimal Pineview northbridge | Damien Zammit |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |