| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2013-07-02 | Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c` | Paul Menzel |
| 2013-05-25 | Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h` | Ronald G. Minnich |
| 2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
| 2013-02-11 | Intel: Replace MSR 0xcd with MSR_FSB_FREQ | Patrick Georgi |
| 2012-07-20 | Fix udelay() implementation for i945 romstage | Nico Huber |
| 2012-01-10 | i945: fix tsc udelay() | Sven Schnelle |
| 2010-10-05 | Remove lib/ramtest.c-include from all CAR boards. | Patrick Georgi |
| 2010-05-14 | i945: | Stefan Reinauer |
| 2009-10-01 | Add some trivial numbers for 945, and Core2 Duo E8200 Intel parts | Peter Stuge |
| 2009-01-20 | put in a little comment (trivial) | Stefan Reinauer |
| 2008-10-29 | Support for the Intel 945 northbridge. | Stefan Reinauer |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |