summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/haswell/registers
AgeCommit message (Expand)Author
2021-05-03nb/intel/haswell: Move PEG registers to a separate headerAngel Pons
2021-05-02nb/intel/haswell: Uniformize include guardsAngel Pons
2021-02-11nb/intel/{haswell,sandybridge}/*/mchbar.h: Fix typo in commentElyes HAOUAS
2021-01-24cpu/intel/haswell: Set C9/C10 vccminAngel Pons
2021-01-10cpu/intel/haswell/haswell.h: Align with BroadwellAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Lock down MC ARB registerAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Lock PCU DDR PTMAngel Pons
2020-10-24nb/intel/haswell: Set up Root Complex topologyAngel Pons
2020-10-23nb/intel/haswell/raminit.c: Clean up local variablesAngel Pons
2020-10-23nb/intel/haswell: Make MAD_DIMM_* registers indexedAngel Pons
2020-10-15nb/intel/haswell: Account for DPR region in memory mapAngel Pons
2020-09-17nb/intel/haswell: Put DMIBAR/EPBAR registers into separate filesAngel Pons
2020-09-17nb/intel/haswell: Move register headers into a subfolderAngel Pons
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 11:18:37 +0000