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path: root/src/northbridge/intel/gm45/raminit.c
AgeCommit message (Expand)Author
2021-04-10nb/intel/gm45: Use new fixed BAR accessorsAngel Pons
2020-10-24nb/intel/gm45: Add more DMIBAR/EPBAR registersAngel Pons
2020-09-21src/northbridge: Drop unneeded empty linesElyes HAOUAS
2020-08-04nb/intel/gm45: Use PCI bitwise opsAngel Pons
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-02-17nb/intel/gm45: Fix typo in console messageElyes HAOUAS
2020-01-14intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() callKyösti Mälkki
2019-12-20src: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-10-27src/[northbridge,security]: change "unsigned" to "unsigned int"Martin Roth
2019-08-26nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :)Nico Huber
2019-06-08northbridge/gm45: document that raminit doesn't support mirrored ranksFelix Held
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-02-07src: Remove unused include device/pnp_def.hElyes HAOUAS
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2018-11-29src: Remove duplicated round up functionElyes HAOUAS
2018-10-24nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardwareArthur Heymans
2018-08-10src: Fix typoElyes HAOUAS
2018-04-04nb/intel/gm45/raminit: Use CxDRT*_MCHBAR instead of magic numbersJonathan Neuschäfer
2018-03-28nb/intel/gm45: Allocate a 8M TSEG regionArthur Heymans
2017-10-03nb/intel/gm45: Remove UMA alignment optimizationNico Huber
2017-06-12nb/intel/gm45: Add romstage timestampsArthur Heymans
2017-04-19nb/intel/gm45: Hide some output behind DEBUG_RAM_SETUPNico Huber
2016-11-28nb/intel/gm45: Fix panel-power-sequence clock divisorNico Huber
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-11-09nb/intel/gm45: Use LAPIC udelay instead of custom versionArthur Heymans
2016-06-12nb/intel/raminit (native): Read PCI mmio size from devicetreePatrick Rudolph
2015-12-31nb/intel/gm45: Export low-power and (SFF) optionsNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-08-16gm45: Decrease MTRR usageVladimir Serbinenko
2014-08-12gm45: Reserve RAM for ME if it's active.Vladimir Serbinenko
2014-07-29gm45: Move spd address map to board-specific config.Vladimir Serbinenko
2014-07-11src: Make use of 'CEIL_DIV(a, b)' macro across treeEdward O'Callaghan
2014-07-01stdlib: Drop duplicates of min() and max()Kyösti Mälkki
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2012-11-27intel/gm45: new northbridgePatrick Georgi
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