| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-11-15 | northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs | Timothy Pearson |
| 2015-11-02 | cpu/amd: Add initial AMD Family 15h support | Timothy Pearson |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2014-07-24 | northbridge/amd: Remove trailing whitespace | Elyes HAOUAS |
| 2014-07-08 | northbridge: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
| 2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
| 2011-06-03 | This patch sets max freq defaults for ddr2 and ddr3for fam10. | Marc Jones |
| 2010-11-13 | MTRR related improvements for AMD family 10h and family 0Fh systems | Scott Duplichan |
| 2010-08-30 | Multi-DIMMS on AMD ddr3 MCT channel B works. | Kerry She |
| 2008-01-18 | Please bear with me - another rename checkin. This qualifies as trivial, no | Stefan Reinauer |
| 2007-12-19 | Initial AMD Barcelona support for rev Bx. | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | User & |
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