diff options
author | Marc Jones <marcj303@gmail.com> | 2011-06-03 19:59:52 +0000 |
---|---|---|
committer | Marc Jones <marc.jones@amd.com> | 2011-06-03 19:59:52 +0000 |
commit | 471f103e530b97c1125acdab259043dd7f252fe9 (patch) | |
tree | f398b52a2d3ae8f9569a851151bfeb02bf4026a9 /src/northbridge/amd/amdmct/wrappers/mcti.h | |
parent | 23d3dfaa96649c71295de205885e97c6b45f9183 (diff) |
This patch sets max freq defaults for ddr2 and ddr3for fam10.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdmct/wrappers/mcti.h')
-rw-r--r-- | src/northbridge/amd/amdmct/wrappers/mcti.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h index 357f2cb9bc..9c948fe2a1 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti.h +++ b/src/northbridge/amd/amdmct/wrappers/mcti.h @@ -57,6 +57,18 @@ UPDATE AS NEEDED #define MAX_CS_SUPPORTED 8 #endif +#ifndef MCT_DIMM_SPARE_NO_WARM +#define MCT_DIMM_SPARE_NO_WARM 0 +#endif + +#ifndef MEM_MAX_LOAD_FREQ +#if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */ + #define MEM_MAX_LOAD_FREQ 800 +#else + #define MEM_MAX_LOAD_FREQ 400 +#endif +#endif + #define MCT_TRNG_KEEPOUT_START 0x00000C00 #define MCT_TRNG_KEEPOUT_END 0x00000CFF |