| Age | Commit message (Expand) | Author |
|---|---|---|
| 2011-06-03 | This patch sets max freq defaults for ddr2 and ddr3for fam10. | Marc Jones |
| 2010-11-13 | MTRR related improvements for AMD family 10h and family 0Fh systems | Scott Duplichan |
| 2010-08-30 | Multi-DIMMS on AMD ddr3 MCT channel B works. | Kerry She |
| 2008-01-18 | Please bear with me - another rename checkin. This qualifies as trivial, no | Stefan Reinauer |
| 2007-12-19 | Initial AMD Barcelona support for rev Bx. | Marc Jones |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |