| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-02-22 | mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17 | Subrata Banik |
| 2021-02-11 | src: Remove unused <arch/cpu.h> | Elyes HAOUAS |
| 2021-01-25 | soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver | Furquan Shaikh |
| 2020-12-01 | mb/intel/adlrvp: Add support for LPDDR5 | Sridhar Siricilla |
| 2020-12-01 | mb/intel/adlrvp: Refactor lpddr4_mem_config structure | Subrata Banik |
| 2020-11-29 | mb/intel/adlrvp: Disable dq_pins_interleaved for DDR4/5 RVP | Subrata Banik |
| 2020-11-09 | mb/intel/adlrvp: Replace if-else-if ladder with switch construct | Sridhar Siricilla |
| 2020-11-08 | mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard' | Subrata Banik |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |