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authorSubrata Banik <subrata.banik@intel.com>2021-02-20 13:52:52 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-02-22 07:26:14 +0000
commit40f53f4b8790c72247901d05e4369ca3e04b28f8 (patch)
treec2955430aec95fd28fd05cd73151fff0eb3c5678 /src/mainboard/intel/adlrvp/memory.c
parentcbcae2744abcc38296106ff87897a5c02f267989 (diff)
mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17
Change-Id: I4f17f9d58d2c07264d7d8e83a6fce832c9304c24 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50980 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/memory.c')
-rw-r--r--src/mainboard/intel/adlrvp/memory.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 5a7fa57832..6f158a057f 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -171,7 +171,8 @@ const struct mb_cfg *variant_memory_params(void)
return &ddr4_mem_config;
case ADL_P_DDR5:
return &ddr5_mem_config;
- case ADL_P_LP5:
+ case ADL_P_LP5_1:
+ case ADL_P_LP5_2:
return &lp5_mem_config;
default:
die("unsupported board id : 0x%x\n", board_id);