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path: root/src/mainboard/intel/adlrvp/include/baseboard
AgeCommit message (Expand)Author
2022-01-18mb/intel/adlrvp: Add wake events for AC connect/disconnectKrishna Prasad Bhat
2021-12-23mb/intel/adlrvp_n: Add support for ADL-N LP5 RVPKrishna Prasad Bhat
2021-11-02mb/intel/adlrvp: Configure EC in RW GPIOAnil Kumar
2021-10-01mb/intel/adlrvp: set PL4 value dynamically for thermalSumeet Pawnikar
2021-10-01mb/intel/adlrvp: set power limits dynamically for thermalSumeet Pawnikar
2021-08-10mb/intel/adlrvp: create dynamic power limits mechanism for thermalSumeet Pawnikar
2021-06-14mb/intel/adlrvp: Add board id for MR DDR5 SKUDeepti Deshatty
2021-03-28mb/intel/adlrvp_m: Enable ADL-M RVP LP5 memory configurationMaulik V Vaghela
2021-03-28mb/intel/adlrvp_m: Enable ADL_M RVP LP4 memory configurationMaulik V Vaghela
2021-02-22mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17Subrata Banik
2020-12-01mb/intel/adlrvp: Remove unused EC_SYNC_IRQ GPIO on ADLRVPSubrata Banik
2020-12-01mb/intel/adlrvp: Add support for LPDDR5Sridhar Siricilla
2020-11-08mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'Subrata Banik