diff options
author | Subrata Banik <subrata.banik@intel.com> | 2020-11-29 20:44:45 +0530 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2020-12-01 08:00:09 +0000 |
commit | 52fabb12470954b9af414f9c380b36648069c07b (patch) | |
tree | 35887735960816fd572e3304046e4f6ee12ff26a /src/mainboard/intel/adlrvp/include/baseboard | |
parent | 5e1d4dd94782194fbd7fde6e4e0286ca1f054b37 (diff) |
mb/intel/adlrvp: Remove unused EC_SYNC_IRQ GPIO on ADLRVP
As per latest schematics GPP_A15 is not used for EC_SYNC_IRQ
hence remove the unused GPIO.
Wrong GPIO configuration is causing platform reboot issue on
ADLRVP with Chrome SKU.
Change-Id: I704cd722683258c80197d8872d3bdaafb7c923dc
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48131
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/include/baseboard')
-rw-r--r-- | src/mainboard/intel/adlrvp/include/baseboard/ec.h | 3 | ||||
-rw-r--r-- | src/mainboard/intel/adlrvp/include/baseboard/gpio.h | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/intel/adlrvp/include/baseboard/ec.h b/src/mainboard/intel/adlrvp/include/baseboard/ec.h index 4303faf0d2..c01829936d 100644 --- a/src/mainboard/intel/adlrvp/include/baseboard/ec.h +++ b/src/mainboard/intel/adlrvp/include/baseboard/ec.h @@ -56,9 +56,6 @@ /* Enable EC backed ALS device in ACPI */ #define EC_ENABLE_ALS_DEVICE -/* Enable EC sync interrupt, EC_SYNC_IRQ is defined in baseboard/gpio.h */ -#define EC_ENABLE_SYNC_IRQ - /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE diff --git a/src/mainboard/intel/adlrvp/include/baseboard/gpio.h b/src/mainboard/intel/adlrvp/include/baseboard/gpio.h index b61276c0c1..de0adf6cff 100644 --- a/src/mainboard/intel/adlrvp/include/baseboard/gpio.h +++ b/src/mainboard/intel/adlrvp/include/baseboard/gpio.h @@ -12,7 +12,4 @@ /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ #define GPE_EC_WAKE GPE0_LAN_WAK -/* EC sync IRQ */ -#define EC_SYNC_IRQ GPP_A15_IRQ - #endif /* __BASEBOARD_GPIO_H__ */ |