coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-11-21	mb/hp/280_g2: Restore comments documenting root port devices	Felix Singer
2023-11-13	mb/hp/280_g2: Make use of the chipset devicetree	Felix Singer
2023-10-25	mb/hp/280_g2/devicetree: Use comma separated list for arrays	Felix Singer
2023-01-30	mb/*: Remove lapic from devicetree	Arthur Heymans
2023-01-13	mainboard: Remove duplicated <soc/gpio.h>	Elyes Haouas
2022-08-13	src/mb: Update unlicensable files with the CC-PDDC SPDX ID	Martin Roth
2022-01-16	soc/intel/skl: Replace dt `HeciEnabled` by `HECI1 disable` config	Subrata Banik
2021-12-12	mainboard: Drop `SataMode` setting from Skylake devicetrees	Felix Singer
2021-10-17	soc/intel/skylake: switch to common GNVS	Michael Niewöhner
2021-09-03	skylake: Default to `BOARD_TYPE_DESKTOP` for PCH-H	Angel Pons
2021-09-03	src/*: Specify type of `DIMM_MAX` once	Angel Pons
2021-09-03	src/*: Specify type of `DIMM_SPD_SIZE` once	Angel Pons
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2021-07-26	mb/*: Specify type of `MAINBOARD_PART_NUMBER` once	Angel Pons
2021-07-26	mb/*: Specify type of `MAINBOARD_DIR` once	Angel Pons
2021-04-20	soc/intel/skylake: Move `SataTestMode` to Kconfig	Angel Pons
2021-04-13	mb/hp/280_g2/romstage.c: Correct CaVrefConfig setting	Angel Pons
2021-02-19	mb/hp/280_g2: Add new mainboard	Angel Pons