diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-04 16:20:54 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-20 09:19:20 +0000 |
| commit | 8f3e1192dfe5e3008524b587de4f06a0f289b646 (patch) | |
| tree | 8a0b0542ad24a7d93ee14f067d1e0525c0451368 /src/mainboard/hp/280_g2 | |
| parent | dfe3a2fcfca5ade7d82ed7e92758e5f329c28880 (diff) | |
soc/intel/skylake: Move `SataTestMode` to Kconfig
This option is not mainboard-specific, and should be user-visible.
Change-Id: I9ff2ca984cd238a112af4efd7685f142cc6e5459
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52099
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/hp/280_g2')
| -rw-r--r-- | src/mainboard/hp/280_g2/devicetree.cb | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/hp/280_g2/devicetree.cb b/src/mainboard/hp/280_g2/devicetree.cb index 8784080f95..98fccc972d 100644 --- a/src/mainboard/hp/280_g2/devicetree.cb +++ b/src/mainboard/hp/280_g2/devicetree.cb @@ -75,9 +75,6 @@ chip soc/intel/skylake [3] = 1, }" # DevSlp not supported - - # Enable test mode for SATA margining - register "SataTestMode" = "1" end device pci 19.0 on end # UART #2 device pci 1c.0 off end # RP #1 |