coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-09-06	mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY	Michael Niewöhner
2020-09-02	mb/google/puff/var/noibat: Update DPTF parameters for noibat	Wisley Chen
2020-09-01	mb/google/puff: Convert ASL file to new DPTF dt impl	Edward O'Callaghan
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-07	soc/intel/cnl: Set Heci1Disable depending on devicetree config	Felix Singer
2020-07-03	mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Noibat	Edward O'Callaghan
2020-06-23	mb/google/hatch: Make puff and variants share common mainboard.c	Edward O'Callaghan
2020-06-22	mb/google/hatch: Make puff and variants share common dptf.asl	Edward O'Callaghan
2020-06-22	mb/google/hatch: Make puff and variants share common ec.h	Edward O'Callaghan
2020-06-17	mb/google/puff: add MST and LSPCON details to variants devicetree	Shiyu Sun
2020-06-14	mb/google/hatch: Switch USB2 port1 and port3 on Noibat	Edward O'Callaghan
2020-06-12	mb/google/hatch: Remove unused USB2 port from Noibat	Edward O'Callaghan
2020-06-12	mb/google/puff: Update i2c[2] and i2c[3] rise and fall times	Sam McNally
2020-06-01	mb/google/hatch: Add Noibat variant	Edward O'Callaghan