Age | Commit message (Expand) | Author |
2021-05-14 | soc/intel/alderlake: Update CPU and IGD Device IDs | Maulik V Vaghela |
2021-04-28 | soc/intel: Add Z370, H310C and B365 device IDs | Angel Pons |
2021-04-28 | soc/intel: Add Kaby Lake PCH-U base device ID | Angel Pons |
2021-04-28 | soc/intel: Rename 200-series PCH device IDs | Angel Pons |
2021-04-06 | soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M | Maulik V Vaghela |
2021-03-11 | soc/intel/common/block: Add PCI IDs for EmmitsBurg PCH | Jonathan Zhang |
2021-03-05 | soc/intel/broadwell/pch: Use Lynx Point smbus.c | Angel Pons |
2021-02-27 | sb/intel/ibexpeak: Add all PCI IDs for LPC | Angel Pons |
2021-02-24 | soc/amd/picasso/data_fabric: add missing data fabric device function 7 | Felix Held |
2021-02-04 | drivers/generic/bayhub_lv2: Add driver for BayHub lv2 | John Su |
2021-02-03 | pci_ids/intel: Add missing CFL-S GT1 IGD IDs | Nico Huber |
2021-02-03 | pci_ids/intel: Correct 0x3e96, it's a CFL-S part | Nico Huber |
2021-02-01 | include/device/pci_ids.h: Add Cannon Lake PCH-H SATA dev ID | Erik van den Bogaert |
2021-01-22 | soc/intel/commmon: Include Alder Lake device IDs | Varshit Pandya |
2021-01-12 | soc/intel/alderlake: Add PCH ID 0x5182 | Subrata Banik |
2020-12-14 | intel/common/block/lpc: Add new device IDs for Emmitsburg PCH | Jonathan Zhang |
2020-12-05 | device/pci_id: Add TCSS PCI IDs for Alderlake | V Sowmya |
2020-11-30 | include/device/pci_ids.h: Fix device id for gspi2 | Bora Guvendik |
2020-11-24 | include/device/pci_ids.h: Add PCI IDs used in Lynxpoint chipsets | Felix Singer |
2020-11-21 | include/device/pci_ids: add PCI IDs for new AMD SoCs | Felix Held |
2020-11-19 | include/device/pci_ids: add model number to ATI GPU and HDA controller | Felix Held |
2020-11-18 | include/device/pci_ids: add model number to AMD GBE controller | Felix Held |
2020-11-18 | include/device/pci_ids: add model number to PCIe port and bus devices | Felix Held |
2020-11-18 | include/device/pci_ids: add model number to data fabric devices | Felix Held |
2020-11-18 | include/device/pci_ids: deduplicate AMD family 17h northbridge ID | Felix Held |
2020-11-18 | include/device/pci_ids: use the right device ID for AMD Picasso GPU | Felix Held |
2020-11-12 | soc/intel/alderlake: Add PCH ID 0x5181 | Subrata Banik |
2020-11-02 | wifi: Drop PCI IDs for JfP and HrP | Furquan Shaikh |
2020-11-02 | pci_ids: Add PCI IDs for CNVi WiFi/BT controllers | Furquan Shaikh |
2020-09-29 | soc/intel/jasperlake: Add IGD, MCH Device ID | Krishna Prasad Bhat |
2020-09-24 | soc/intel/common/smbus: Add support for Apollo Lake SoC | Maxim Polyakov |
2020-09-18 | drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755 | Ben Chuang |
2020-09-14 | src/include: Drop unneeded empty lines | Elyes HAOUAS |
2020-09-08 | pci_ids: Add Alder Lake DTT PCI IDs | Subrata Banik |
2020-09-08 | pci_ids: Add Alder Lake IPU PCI IDs | Subrata Banik |
2020-09-08 | soc/intel/elkhartlake: Add CPU, SA, PCH & IGD DIDs Table | Tan, Lean Sheng |
2020-09-01 | {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent | Subrata Banik |
2020-08-29 | PCI IDs: Add PCI ID for CML DPTF/DTT PCI device | Edward O'Callaghan |
2020-08-27 | soc/intel/common: Include Elkhart Lake SA IDs | Tan, Lean Sheng |
2020-08-17 | soc/intel/jasperlake: Add IGD Device ID | Krishna Prasad Bhat |
2020-08-10 | soc/intel/common: Include Alder Lake SATA controller device IDs | Subrata Banik |
2020-08-05 | drivers/genesyslogic/gl9763e: Add driver for Genesys Logic GL9763E | Ben Chuang |
2020-08-05 | soc/intel/common: Include Alder Lake device IDs | Subrata Banik |
2020-07-28 | PCI IDs: Add PCI ID for the realtek 5261 | Caveh Jalali |
2020-07-25 | soc/intel/tigerlake: Update Tiger Lake SA IDs | Derek Huang |
2020-07-15 | PCI IDs: Add PCI ID for JSL DPTF/DTT PCI device | Tim Wawrzynczak |
2020-07-12 | soc/intel/tigerlake: Add new IGD device | Ravi Sarawadi |
2020-07-07 | soc/intel/common/block: Add new block DTT | Tim Wawrzynczak |
2020-07-07 | pci_ids: Add TGL & JSL IPU PCI IDs | Tim Wawrzynczak |
2020-04-29 | device/pci_id: Add Tiger Lake TCSS device ID | John Zhao |
2020-04-28 | amd/family17h: Add PCI device IDs for all controllers in AMD Family17h | Furquan Shaikh |
2020-04-28 | soc/amd: Update macro name for IOMMU on AMD Family 17h | Furquan Shaikh |
2020-04-28 | soc/intel/jasperlake: Add new MCH device ids | Maulik V Vaghela |
2020-04-16 | intel/common/block/lpc: Add new device IDs for Lewisburg PCH | BryantOu |
2020-04-07 | drivers/intel/wifi: Add support for Intel Wi-Fi 6 Series | Subrata Banik |
2020-03-22 | device/pci_id: Maintain consistent tab in pci_ids.h | Subrata Banik |
2020-03-20 | sb/ibexpeak: Use macros instead of hard-coded IDs | Felix Singer |
2020-03-17 | src/include/device: Add Intel Tiger Lake Thunderbolt device Id | John Zhao |
2020-03-16 | drivers/intel/ish: Add TGL ISH PCI id | li feng |
2020-03-02 | soc/intel/denverton: Move PCI IDs to pci_ids.h | Felix Singer |
2020-03-02 | soc/amd/picasso: Add PCI ID for Dali xHCI | Marshall Dawson |
2020-02-25 | soc/intel/common: Update Jasper Lake Device IDs | Meera Ravindranath |
2020-02-17 | soc/tigerlake: Add Device id for Tiger Lake Dual Core | Srinidhi N Kaushik |
2020-01-22 | soc/intel/common: Add Elkhartlake Device IDs | Tan, Lean Sheng |
2020-01-18 | soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs | Gaggery Tsai |
2020-01-08 | soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID | Jamie Chen |
2020-01-05 | pci_ids: Correct whitespace for all AMD, ATI, National Semi | Marshall Dawson |
2019-12-13 | soc/intel/common: Add PCI device IDs for CMP-H | Gaggery Tsai |
2019-12-10 | soc/intel/common: Add Jasperlake Device IDs | rkanabar |
2019-12-10 | include/device/pci_ids: Add Coffeelake U IGD P630 | Christian Walter |
2019-12-02 | src/soc/intel: Add Cometlake-S and CMP-H skus | Gaggery Tsai |
2019-11-28 | pci_ids: Update Intel Lewisburg SMBUS PCI ID | Jonathan Zhang |
2019-11-22 | sb/i82801ix: Use macros instead of hard-coded IDs | Felix Singer |
2019-11-21 | nb/sb/cpu: Drop Intel Rangeley support | Arthur Heymans |
2019-11-14 | soc/intel/tigerlake: Include few more Tigerlake device IDs | Subrata Banik |
2019-11-05 | soc/intel/common: Include Tigerlake device IDs | Ravi Sarawadi |
2019-10-20 | pci_ids: Add AMD Family 17h ACP | Marshall Dawson |
2019-10-05 | soc/intel/common/block/p2sb/p2sb: Add missing PCI IDs | Patrick Rudolph |
2019-10-04 | src/pci_ids: add missing Intel Kaby Lake iGPU PCIIDs | Maxim Polyakov |
2019-10-04 | src/pci_ids: add missing Intel Skylake iGPU PCIIDs | Maxim Polyakov |
2019-09-30 | pci_ids: fix PCI ID for Intel Iris HALO GT4 iGPU | Maxim Polyakov |
2019-09-30 | pci_ids: rename PCI_DEVICE_ID_INTEL_SKL_ID_H | Maxim Polyakov |
2019-09-06 | soc/intel/skylake: Add Lewisburg family PCH support | Maxim Polyakov |
2019-08-30 | soc/intel/skylake: Remove duplicated PCI Id | Maxim Polyakov |
2019-08-28 | soc/intel/cnl: Add CML IGD IDs | Meera Ravindranath |
2019-08-26 | soc/intel/common: Include cometlake EMMC controller ID | Jamie Chen |
2019-08-23 | soc/intel/cometlake: Add ISH Device ID | Bernardo Perez Priego |
2019-08-16 | soc/intel/cannonlake: Add more PCI Ids for Coffeelake | Christian Walter |
2019-07-31 | soc/intel/skl: Add C232 chipset and reorder IDs | Felix Singer |
2019-07-30 | soc/intel/cannonlake: Add new PCI IDs | Felix Singer |
2019-07-21 | pci_ids: Add AMD Family 17h host bridge | Marshall Dawson |
2019-07-21 | nb/amd/trinity: Rename PCI ID of the IOMMU | Marshall Dawson |
2019-07-21 | pci_ids: Reorder AMD internal northbridge and IOMMU IDs | Marshall Dawson |
2019-07-17 | soc/intel/cannonlake: Add device Ids for new CFL SKUs support | Lean Sheng Tan |
2019-07-12 | pci_ids: Drop a block of unused, redundant definitions | Nico Huber |
2019-07-12 | soc/intel/common: Add Coffee Lake H 6+2 Xeon graphics id | Nico Huber |
2019-07-12 | soc/intel/common: Add CM246 LPC device id | Nico Huber |
2019-06-30 | pci_ids.h: Add AMD Picasso IDs | Marshall Dawson |
2019-06-13 | soc/intel/icelake: Replace PCI device LPC to ESPI as per EDS | Subrata Banik |
2019-06-08 | src/soc/intel/skylake/bootblock: Add SPT C236 to PCH Table | Christian Walter |