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path: root/src/cpu/x86/mtrr
AgeCommit message (Expand)Author
2020-10-20cpu/x86/mtrr: add support for address space higher than 16TiBJonathan Zhang
2020-06-23src/*: Update makefiles to exclude x86 code from psp-verstageMartin Roth
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-02cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()Aaron Durbin
2020-06-02cpu/x86/mtrr: add helper for setting multiple MTRRsAaron Durbin
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-08cpu/x86/mtrr: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-01cpu/x86/mtrr/earlymtrr: Validate MTRR argumentsRaul E Rangel
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS
2020-04-29src/cpu/x86/mtrr/earlymtrr: Add clear_all_var_mtrrRaul E Rangel
2020-04-04src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons
2019-11-03cpu/x86/mtrr/xip_cache.c: Fix inconsistent messageAngel Pons
2019-11-02cpu/x86: Add a prog_run hook to set up caching of XIP stagesArthur Heymans
2019-09-28cpu,device/: Remove some __SIMPLE_DEVICE__ and __ROMCC__ useKyösti Mälkki
2019-09-10AUTHORS: Move src/cpu copyrights into AUTHORS fileMartin Roth
2019-08-08cpu/x86/mtrr: Replace CONFIG_CPU_ADDR_BITS with cpu_phys_address_size()Subrata Banik
2019-06-22src/cpu: Use 'include <stdlib.h>' when appropriateElyes HAOUAS
2019-06-21cpu: Add missing #include <commonlib/helpers.h>Elyes HAOUAS
2019-05-29cpu/x86/mtrr: Assert that MSR arrays are fully initializedJacob Garber
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-06src: Drop unused include <arch/acpi.h>Elyes HAOUAS
2019-02-28cpu/x86/mtrr/mtrr.c:Avoid static scan false positiveRichard Spiegel
2018-11-23soc/intel/common: Bring DISPLAY_MTRRS into the lightNico Huber
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-04-11Correct "MTTR" to "MTRR"Jonathan Neuschäfer
2018-04-11cpu/x86/mtrr: Fix broken output ("indexis")Jonathan Neuschäfer
2018-04-09cpu/x86/mtrr: Use single code path with/without holesNico Huber
2018-04-09cpu/x86/mtrr: Optimize hole carving strategyNico Huber
2018-02-16x86/mtrr: Enable Rd/WrDram mod in AMD fixed MTRRsMarshall Dawson
2017-10-16cpu/x86/mtrr: Remove var-MTRR alignment optimizationNico Huber
2017-07-13src/cpu: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-13cpu/x86/mtrr: fail early if solution exceeds available MTRRsAaron Durbin
2017-03-16cpu/x86: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/x86: Add int to unsignedLee Leahy
2017-03-16cpu/x86: Use tabs for indentLee Leahy
2017-02-22src/cpu/x86: Update/Add license headers to all filesMartin Roth
2016-11-12cpu/x86/mtrr: allow temporary MTRR range during corebootAaron Durbin
2016-09-12cpu/x86: Move fls() and fms() to mtrr.hRizwan Qureshi
2016-07-22cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundaryAaron Durbin
2016-04-28soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov
2016-03-18mtrr: Define a function for obtaining free var mtrrFurquan Shaikh
2016-03-16cpu/x86: compile earlymtrr.c code for romstage as wellAndrey Petrov
2016-03-16cpu/x86/mtrr: remove early_mtrr_* functionsAaron Durbin
2016-03-16cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin
2016-03-08cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin
2016-02-02src: Fix various spelling and whitespace issues.Martin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/x86/mtrr: Add MTRR index and total MTRRs to error messagePaul Menzel
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-07-12Verify Kconfigs symbols are not zero for hex and int type symbolsMartin Roth
2015-07-12Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()Martin Roth
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-09-25x86/mtrr: Enable MTRR's before enabling cachingIsaac Christensen
2014-09-24x86: Minimize work done with the caches disabled in mtrr functions.Gabe Black
2014-06-30x86 MTRR: Drop unused return valueKyösti Mälkki
2014-06-30Use MTRR definesKyösti Mälkki
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-02-09mtrr: only add prefetchable resources as WRCOMB for VGA devicesAaron Durbin
2014-02-06MTRR: Mark all prefetchable resources as WRCOMB.Vladimir Serbinenko
2014-02-06mtrr: retry fitting w/o WRCOMB if usage exceeds BIOS allocationAaron Durbin
2014-01-26src/cpu: Fix spelling of MTTR to MTRRPaul Menzel
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2013-12-26AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki
2013-10-03cpu/x86/mtrr/mtrr.c: Remove superfluous assignment to `type_index`Paul Menzel
2013-07-11cpu: Fix spellingMartin Roth
2013-05-01x86: use boot state callbacks to disable rom cacheAaron Durbin
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-04-01boot: add disable_cache_rom() functionAaron Durbin
2013-03-29x86: mtrr: optimize hole carving above 4GiBAaron Durbin
2013-03-29x86: mtrr: add hole punching supportAaron Durbin
2013-03-29x86: add rom cache variable MTRR index to tablesAaron Durbin
2013-03-29x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin
2013-03-29mtrr: honor IORESOURCE_WRCOMBAaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-22x86: unify amd and non-amd MTRR routinesAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
2012-07-24MTRR: drop repetetive debug messageStefan Reinauer
2012-07-16Check for IORESOURCE_UMA_FB in MTRR setupKyösti Mälkki
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-07-12Drop Kconfig VAR_MTRR_HOLE optionKyösti Mälkki
2012-05-30Fix the location of "Setting variable MTRR" printk.Denis 'GNUtoo' Carikli
2012-05-08Some more #if cleanupPatrick Georgi
2012-04-06Cache 8MB flash instead of 4MBStefan Reinauer
2012-03-30Make MTRR min hole alignment 64MBDuncan Laurie
2012-03-30Fix MB calculation in the reporting of the MTRR holeDuncan Laurie
2012-03-30MTRR: add alternate allocation method for odd memory mapsDuncan Laurie
2012-03-30Add an option to keep the ROM cached after romstageStefan Reinauer
2012-01-10MTRR: get physical address size from CPUIDSven Schnelle
2011-10-28Get rid of AUTO_XIP_ROM_BASEPatrick Georgi
2011-04-14earlymtrr.c: wipe some dead code, use names instead of numbers and someStefan Reinauer
2011-01-19Now that the VIA code is run above 1Meg (like other boards), it shouldKevin O'Connor
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-01make early_mtrr_init() invisible for cache as ram targets as it breaks them.Stefan Reinauer
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
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