coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-05-27	cpu/intel/model_2065x: Put stage cache in TSEG	Arthur Heymans
2019-05-27	cpu/intel/model_2065x: Use parallel MP init	Arthur Heymans
2019-04-25	cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZE	Arthur Heymans
2018-12-28	arch/x86: SSE2 implies SSE support	Kyösti Mälkki
2016-12-27	cpu/intel/common: Add/Use common function to set virtualization	Matt DeVillier
2015-09-09	intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMER	Martin Roth
2015-05-28	smm: Merge configs SMM_MODULES and SMM_TSEG	Vladimir Serbinenko
2015-05-28	Migrate 2065x to SMM_MODULES	Vladimir Serbinenko
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-07-05	intel: Make monotonic timer a first class citizen	Edward O'Callaghan
2014-05-10	Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT	Kyösti Mälkki
2014-05-06	Introduce stage-specific architecture for coreboot	Furquan Shaikh
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2014-04-26	Get rid of HAVE_INIT_TIMER config option	Furquan Shaikh
2014-01-23	intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.	Vladimir Serbinenko
2013-12-13	cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS	Alexandru Gagniuc
2013-11-13	intel/2065x: Use TSC for udelay()	Vladimir Serbinenko
2013-06-13	Add support for Intel Nehalem CPU	Vladimir Serbinenko