coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-28	cpu/intel/fsp_model_206ax: Load microcode in coreboot	Martin Roth
2015-10-22	Revert "Remove sandybridge and ivybridge FSP code path"	Martin Roth
2015-10-03	Remove sandybridge and ivybridge FSP code path	Alexandru Gagniuc
2015-09-30	cpu: microcode: Use microcode stored in binary format	Alexandru Gagniuc
2015-05-28	smm: Merge configs SMM_MODULES and SMM_TSEG	Vladimir Serbinenko
2015-05-28	Migrate fsp_206ax to SMM_MODULES	Vladimir Serbinenko
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-24	fsp: Move fsp to fsp1_0	Marc Jones
2015-02-06	FSP & CBMEM: Fix broken cbmem CAR transition.	Martin Roth
2015-01-27	CBMEM: Always use DYNAMIC_CBMEM	Kyösti Mälkki
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-12-16	Intel FSP: Move to DYNAMIC_CBMEM	Kyösti Mälkki
2014-12-05	FSP platform microcode: Update to remove Kconfig variable	Martin Roth
2014-07-05	intel: Make monotonic timer a first class citizen	Edward O'Callaghan
2014-05-10	Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT	Kyösti Mälkki
2014-05-09	cougar_canyon2: Switch CPU/NB/SB to the shared FSP code	Martin Roth
2014-05-06	Introduce stage-specific architecture for coreboot	Furquan Shaikh
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2013-12-13	cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS	Alexandru Gagniuc
2013-12-05	cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig option	Alexandru Gagniuc
2013-12-04	Add the Intel FSP 206ax CPU core support	Marc Jones