diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/siemens/mc_apl1/bootblock.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_apl1/bootblock.c b/src/mainboard/siemens/mc_apl1/bootblock.c index a858f1b048..7aab2a0f07 100644 --- a/src/mainboard/siemens/mc_apl1/bootblock.c +++ b/src/mainboard/siemens/mc_apl1/bootblock.c @@ -2,7 +2,26 @@ #include <baseboard/variants.h> #include <bootblock_common.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> #include <intelblocks/gpio.h> +#include <types.h> + +static void pcie_rp_early_enable(void) +{ + const pci_devfn_t rp_dev = PCI_DEV(0, CONFIG_EARLY_PCI_BRIDGE_DEVICE, + CONFIG_EARLY_PCI_BRIDGE_FUNCTION); + + if (pci_read_config16(rp_dev, PCI_VENDOR_ID) == 0xffff) + return; + + /* + * Needs to be done "immediately after PERST# de-assertion" + * as per IAFW BIOS spec volume 2 (doc 559811) + */ + pci_and_config32(rp_dev, 0x338, ~(1 << 26)); /* BLKDQDA */ + pci_and_config32(rp_dev, 0xf4, ~(1 << 2)); /* BLKPLLEN */ +} void bootblock_mainboard_early_init(void) { @@ -11,4 +30,8 @@ void bootblock_mainboard_early_init(void) pads = variant_early_gpio_table(&num); gpio_configure_pads(pads, num); + + /* Enable the PCIe root port when used before FSP-M MemoryInit() */ + if (CONFIG(EARLY_PCI_BRIDGE)) + pcie_rp_early_enable(); } |